Tool ULTIMATE Automizer 0.1.23-635dfa2a CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a CPA-witness2test 1.7-svn 29852 CProver witness2test 0.1 CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 90 s, memlimit: 7000 MB, CPU core limit: 2 timelimit: 900 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon*
OS Linux 4.15.0-42-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33546 MB
Date of execution 2018-12-08 07:42:40 CET 2018-12-09 20:30:54 CET 2018-12-09 21:05:03 CET 2018-12-09 21:08:07 CET 2018-12-12 21:10:19 CET 2018-12-09 16:43:04 CET 2018-12-09 20:42:29 CET
Run set uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors
Options --full-output -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -setprop cpa.smg.memoryAllocationFunctions=malloc,__kmalloc,kmalloc,kzalloc,kzalloc_node,ldv_zalloc,ldv_malloc -setprop cpa.smg.arrayAllocationFunctions=calloc,kmalloc_array,kcalloc -setprop cpa.smg.zeroingMemoryAllocation=calloc,kzalloc,kcalloc,kzalloc_node,ldv_zalloc -setprop cpa.smg.deallocationFunctions=free,kfree,kfree_const -witness ../../results-verified/uautomizer.2018-12-08_0742.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/uautomizer.2018-12-08_0742.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop analysis.summaryEdges=true -setprop cpa.callstack.skipVoidRecursion=true -setprop cpa.callstack.skipFunctionPointerRecursion=true -witness ../../results-verified/uautomizer.2018-12-08_0742.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --graphml-witness ../../results-verified/uautomizer.2018-12-08_0742.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -witness ../../results-verified/uautomizer.2018-12-08_0742.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/uautomizer.2018-12-08_0742.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml
sv-benchmarks/c/ status score witness inspect witness cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
bitvector/byte_add_false-unreach-call_true-no-overflow_true-termination.i false(unreach-call) 1 wit inspect 150   110   830 1600 .71 0      true -32 wit inspect 6.5  3.5  270 0   0   false(unreach-call) 1 --- inspect 29     17     530   .68 0      unknown 0 --- inspect 5.5  3.1  260 0   0   true -32 --- inspect .67   .66   21    .057 0     - --- inspect - --- inspect
bitvector/sum02_false-unreach-call_true-no-overflow.i unknown 0 --- inspect 18   13   370 200 .66 0      error (invalid witness file) 0 --- inspect .78 .47 41 0   0   error (2) 0 --- inspect .020 .021 5.6 0    0      error (invalid witness file) 0 --- inspect 1.0  .64 48 0   0   error (invalid witness file) 0 --- inspect .0029 .0041 .52 0     0     - --- inspect - --- inspect
bitvector/byte_add_1_true-unreach-call_true-no-overflow_true-termination.i timeout 0 --- inspect 900   860   1000 14000 .73 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .60 .36 40 0   0      error (2) 0 --- inspect .026 .027 5.6 0    0     
bitvector/byte_add_2_true-unreach-call_true-no-overflow_true-termination.i timeout 0 --- inspect 900   860   1000 11000 .73 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .67 .40 40 0   0      error (2) 0 --- inspect .026 .027 5.6 0    0     
bitvector/gcd_1_true-unreach-call_true-no-overflow.i timeout 0 --- inspect 900   890   570 12000 .64 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .68 .41 42 0   0      error (2) 0 --- inspect .027 .028 5.6 0    0     
bitvector/gcd_2_true-unreach-call_true-no-overflow.i timeout 0 --- inspect 900   890   740 11000 .63 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .65 .40 41 0   0      error (2) 0 --- inspect .022 .023 5.6 0    0     
bitvector/gcd_3_true-unreach-call_true-no-overflow.i timeout 0 --- inspect 900   880   1300 10000 .63 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .68 .42 41 0   0      error (2) 0 --- inspect .026 .027 5.6 0    0     
bitvector/gcd_4_true-unreach-call_true-no-overflow_true-termination.i true 2 wit inspect 58   46   710 670 .62 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 6.9  4.5  320 0   0      true 2 --- inspect 42     32     610   .62 0     
bitvector/interleave_bits_true-unreach-call_true-no-overflow.i true 2 wit inspect 140   120   700 1800 .71 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 12    7.8  420 0   0      true 2 --- inspect 160     150     660   .68 0     
bitvector/jain_1_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 23   17   380 270 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.4  3.0  280 0   0      true 2 --- inspect 43     39     350   .62 0     
bitvector/jain_2_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 19   13   360 190 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.6  3.1  290 0   .0041 true 2 --- inspect 44     39     380   .62 0     
bitvector/jain_4_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 21   15   370 250 .66 .0041 - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 7.0  4.6  300 0   0      true 2 --- inspect 37     32     410   .62 0     
bitvector/jain_5_true-unreach-call_true-no-overflow.i timeout 0 --- inspect 900   880   760 12000 .63 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .59 .36 41 0   0      error (2) 0 --- inspect .024 .025 5.6 0    0     
bitvector/jain_6_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 25   19   370 310 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 7.3  4.8  300 0   .0041 true 2 --- inspect 52     46     400   .62 0     
bitvector/jain_7_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 110   100   490 1400 .62 0      - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    900    770 0   0      true 2 --- inspect 210     200     470   .62 0     
bitvector/modulus_true-unreach-call_true-no-overflow.i true 2 wit inspect 12   5.0 440 110 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 19    16    350 0   0      true 2 --- inspect 15     9.8   320   .62 0     
bitvector/num_conversion_1_true-unreach-call_true-no-overflow.i true 2 wit inspect 31   14   600 310 .75 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 6.0  3.3  280 0   0      true 2 --- inspect 40     26     590   .68 0     
bitvector/num_conversion_2_true-unreach-call_true-no-overflow.i error (7) 0 --- inspect 740   710   2200 9200 .71 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .63 .38 40 0   0      error (2) 0 --- inspect .022 .023 5.6 0    0     
bitvector/parity_true-unreach-call_true-no-overflow.i timeout 0 --- inspect 900   890   1100 13000 .73 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .67 .41 42 0   0      error (2) 0 --- inspect .026 .027 5.6 0    0     
bitvector/sum02_true-unreach-call_true-no-overflow.i unknown 0 --- inspect 320   310   620 4700 .62 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .61 .37 41 0   0      error (2) 0 --- inspect .027 .028 5.5 0    0     
bitvector/s3_clnt_1_false-unreach-call_true-no-overflow.BV.c.cil.c false(unreach-call) 1 wit inspect 28   9.4 600 220 .75 .041  false(unreach-call) 1 wit inspect 9.5  5.0  310 0   0   false(unreach-call) 1 --- inspect 21     12     410   .68 0      unknown 0 --- inspect 9.5  5.1  320 0   0   true -32 --- inspect 1.1    1.1    22    .12  0     - --- inspect - --- inspect
bitvector/s3_clnt_2_false-unreach-call_true-no-overflow.BV.c.cil.c false(unreach-call) 1 wit inspect 33   10   680 280 .75 0      false(unreach-call) 1 wit inspect 12    6.2  390 0   0   false(unreach-call) 1 --- inspect 23     13     500   .68 0      unknown 0 --- inspect 11    5.6  370 0   0   true -32 --- inspect 1.2    1.2    23    .11  0     - --- inspect - --- inspect
bitvector/s3_clnt_3_false-unreach-call_true-no-overflow.BV.c.cil.c false(unreach-call) 1 wit inspect 27   8.9 650 250 .75 0      false(unreach-call) 1 wit inspect 8.7  4.5  270 0   0   false(unreach-call) 1 --- inspect 20     11     390   .68 0      unknown 0 --- inspect 7.8  4.2  270 0   0   true -32 --- inspect .90   .90   22    .11  .041 - --- inspect - --- inspect
bitvector/s3_clnt_1_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 45   16   980 360 .75 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 81    70    1000 0   0      true 2 --- inspect 45     27     770   .71 0     
bitvector/s3_clnt_2_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 46   16   1000 390 .75 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 23    13    610 0   0      true 2 --- inspect 59     33     930   .71 0     
bitvector/s3_clnt_3_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 29   8.1 900 230 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 21    12    560 0   0      out of memory 0 --- inspect 130     86     7000   .64 0     
bitvector/s3_srvr_1_alt_true-unreach-call_true-no-overflow.BV.c.cil.c timeout 0 --- inspect 900   860   2500 13000 .64 0      - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .64 .39 40 0   0      error (2) 0 --- inspect .026 .027 5.7 0    0     
bitvector/s3_srvr_1_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 64   26   1700 550 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 910    890    4700 0   0      true 2 --- inspect 59     33     870   .62 0     
bitvector/s3_srvr_2_alt_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c true 2 wit inspect 48   16   1600 440 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    4300 0   0      true 2 --- inspect 38     22     950   .62 0     
bitvector/s3_srvr_2_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c true 2 wit inspect 44   15   1400 390 .62 0      - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    4400 0   0      true 2 --- inspect 150     99     4100   .62 0     
bitvector/s3_srvr_3_alt_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 43   15   1300 370 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 910    890    6200 0   0      true 2 --- inspect 56     31     940   .62 0     
bitvector/s3_srvr_3_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 43   15   1300 390 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 910    890    5400 0   0      true 2 --- inspect 43     24     820   .62 0     
bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 270   230   900 2900 .71 .066  - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    850    5100 0   0      true 2 --- inspect 150     130     780   .71 .0082
bitvector/soft_float_2_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 40   19   800 380 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 --- inspect 910    850    6700 0   0      true 2 --- inspect 34     21     650   .62 0     
bitvector/soft_float_3_true-unreach-call_true-no-overflow_true-termination.c.cil.c timeout 0 --- inspect 900   820   830 12000 .70 .020  - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .69 .43 41 0   0      error (2) 0 --- inspect .028 .029 5.6 0    0     
bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 750   700   850 9400 .71 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 94    89    540 0   0      true 2 --- inspect 360     320     800   .68 .0082
bitvector/soft_float_5_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 26   11   750 230 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 830    770    7000 0   0      true 2 --- inspect 24     14     590   .66 0     
bitvector-regression/implicitfloatconversion_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 13   5.2 360 98 .75 0      false(unreach-call) 1 wit inspect 3.6  2.0  250 0   0   false(unreach-call) 1 --- inspect 12     7.4   290   .68 0      false(unreach-call) 1 --- inspect 4.0  2.3  250 0   0   false(unreach-call) 1 --- inspect .56   .57   20    .041 0     - --- inspect - --- inspect
bitvector-regression/implicitunsignedconversion_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 6.5 2.4 320 48 .66 0      false(unreach-call) 1 wit inspect 4.9  2.7  250 0   0   false(unreach-call) 1 --- inspect 6.5   4.0   290   .62 0      false(unreach-call) 1 --- inspect 3.6  2.1  250 0   0   false(unreach-call) 1 --- inspect .59   .59   20    .041 0     - --- inspect - --- inspect
bitvector-regression/integerpromotion_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 13   5.0 360 100 .75 0      false(unreach-call) 1 wit inspect 3.7  2.1  250 0   0   false(unreach-call) 1 --- inspect 12     7.4   300   .68 0      false(unreach-call) 1 --- inspect 3.6  2.1  250 0   0   false(unreach-call) 1 --- inspect .59   .59   20    .041 0     - --- inspect - --- inspect
bitvector-regression/recHanoi03_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 350   300   810 3200 .71 0      false(unreach-call) 1 wit inspect 8.1  4.4  290 0   0   true -32 --- inspect 7.6   4.2   310   .62 0      false(unreach-call) 1 --- inspect 5.9  3.3  270 0   0   true -32 --- inspect .58   .58   21    .049 0     - --- inspect - --- inspect
bitvector-regression/signextension2_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 6.6 2.5 330 53 .66 0      false(unreach-call) 1 wit inspect 4.4  2.4  250 0   0   false(unreach-call) 1 --- inspect 6.6   3.8   300   .62 0      false(unreach-call) 1 --- inspect 3.7  2.2  250 0   0   false(unreach-call) 1 --- inspect .58   .58   20    .045 0     - --- inspect - --- inspect
bitvector-regression/signextension_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 7.7 2.6 360 55 .66 0      false(unreach-call) 1 wit inspect 4.1  2.3  250 0   0   false(unreach-call) 1 --- inspect 7.0   4.0   300   .62 0      false(unreach-call) 1 --- inspect 4.8  2.7  250 0   0   false(unreach-call) 1 --- inspect .57   .58   20    .045 0     - --- inspect - --- inspect
bitvector-regression/implicitunsignedconversion_true-unreach-call_true-termination.c true 2 wit inspect 7.8 2.7 360 63 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.3  2.4  250 0   0      true 2 --- inspect 7.1   4.6   310   .62 0     
bitvector-regression/integerpromotion_true-unreach-call_true-termination.c true 2 wit inspect 13   5.1 350 100 .75 15      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.3  1.9  250 0   0      true 2 --- inspect 13     7.5   300   .75 0     
bitvector-regression/signextension2_true-unreach-call_true-termination.c true 2 wit inspect 7.8 2.6 370 62 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.2  1.8  250 0   0      true 2 --- inspect 7.7   4.4   300   .62 0     
bitvector-regression/signextension_true-unreach-call_true-termination.c true 2 wit inspect 8.3 2.8 370 63 .66 0      - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.4  1.9  250 0   0      true 2 --- inspect 7.4   4.6   310   .62 0     
bitvector-loops/diamond_false-unreach-call2.i false(unreach-call) 1 wit inspect 17   9.8 440 160 .66 0      false(unreach-call) 1 wit inspect 5.0  2.8  250 0   0   false(unreach-call) 1 --- inspect 7.8   4.5   310   .62 .0041 false(unreach-call) 1 --- inspect 4.0  2.3  250 0   0   true -32 --- inspect .58   .58   20    .049 0     - --- inspect - --- inspect
bitvector-loops/overflow_false-unreach-call1.i timeout 0 --- inspect 900   880   670 11000 .63 0      error (invalid witness file) 0 --- inspect .80 .49 42 0   0   error (2) 0 --- inspect .021 .022 5.7 0    0      error (invalid witness file) 0 --- inspect 1.0  .66 47 0   0   error (invalid witness file) 0 --- inspect .0019 .0025 .53 0     0     - --- inspect - --- inspect
bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i false(unreach-call) 1 wit inspect 250   230   550 3500 .62 0      false(unreach-call) 1 wit inspect 6.5  3.7  280 0   0   timeout 0 --- inspect 97     87     770   1.3  0      unknown 0 --- inspect 4.3  2.5  250 0   0   true -32 --- inspect .57   .58   21    .049 0     - --- inspect - --- inspect
sv-benchmarks/c/ status score witness inspect witness cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
total 50 62 13000 12000 39000 160000 34   15     14 -21 78   43   3400 0   0   14 -22 250   180   4700 8.5  .0041 14 7 69 39 3300 0   0   14 -219 8.5 8.5 250 .76 .041 36 32 8400 8100 51000 0   .0082 36 48 1800 1400 25000 16 .016
    correct results 37 62 2800 2200 26000 31000 25   15     11 11 70   38   3100 0   0   10 10 150   84   3600 6.6  .0041 7 7 30 17 1800 0   0   5 5 2.9 2.9 100 .21 0     16 32 300 240 6300 0   .0082 24 48 1700 1300 18000 16 .016
        correct true 25 50 1900 1500 19000 22000 17   15     0 0 0 0 16 32 300 240 6300 0   .0082 24 48 1700 1300 18000 16 .016
        correct false 12 12 890 690 6300 9600 8.4 .041 11 11 70   38   3100 0   0   10 10 150   84   3600 6.6  .0041 7 7 30 17 1800 0   0   5 5 2.9 2.9 100 .21 0     0 0
    incorrect results 0 1 -32 6.5 3.5 270 0   0   1 -32 7.6 4.2 310 .62 0      0 7 -224 5.6 5.6 150 .54 .041 0 0
        incorrect true 0 1 -32 6.5 3.5 270 0   0   1 -32 7.6 4.2 310 .62 0      0 7 -224 5.6 5.6 150 .54 .041 0 0
        incorrect false 0 0 0 0 0 0 0
score (50 tasks, max score: 86) 62 -21 -22 7 -219 32 48
Run set uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-uautomizer.sv-comp19_prop-reachsafety.ReachSafety-BitVectors