Tool PeSCo 1.7-svn b8d6131600+ CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a CPA-witness2test 1.7-svn 29852 CProver witness2test 0.1 CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 90 s, memlimit: 7000 MB, CPU core limit: 2 timelimit: 900 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon* [apollon004; apollon069; apollon137; apollon154] [apollon004; apollon006; apollon021; apollon061; apollon109; apollon155] apollon*
OS Linux 4.15.0-42-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33546 MB
Date of execution 2018-12-06 12:44:04 CET 2018-12-08 07:39:30 CET 2018-12-08 12:16:42 CET 2018-12-08 13:32:07 CET 2018-12-12 20:37:42 CET 2018-12-08 05:07:50 CET 2018-12-08 09:11:31 CET
Run set pesco.sv-comp19_prop-reachsafety.ReachSafety-Heap cpa-seq-validate-violation-witnesses-pesco.sv-comp19_prop-reachsafety.ReachSafety-Heap uautomizer-validate-violation-witnesses-pesco.sv-comp19_prop-reachsafety.ReachSafety-Heap cpa-witness2test-validate-violation-witnesses-pesco.sv-comp19_prop-reachsafety.ReachSafety-Heap fshell-witness2test-validate-violation-witnesses-pesco.sv-comp19_prop-reachsafety.ReachSafety-Heap cpa-seq-validate-correctness-witnesses-pesco.sv-comp19_prop-reachsafety.ReachSafety-Heap uautomizer-validate-correctness-witnesses-pesco.sv-comp19_prop-reachsafety.ReachSafety-Heap
Options -svcomp19-pesco -heap 10000M -stack 2048k -benchmark -timelimit 900s -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -setprop cpa.smg.memoryAllocationFunctions=malloc,__kmalloc,kmalloc,kzalloc,kzalloc_node,ldv_zalloc,ldv_malloc -setprop cpa.smg.arrayAllocationFunctions=calloc,kmalloc_array,kcalloc -setprop cpa.smg.zeroingMemoryAllocation=calloc,kzalloc,kcalloc,kzalloc_node,ldv_zalloc -setprop cpa.smg.deallocationFunctions=free,kfree,kfree_const -witness ../../results-verified/pesco.2018-12-06_1244.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/pesco.2018-12-06_1244.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop analysis.summaryEdges=true -setprop cpa.callstack.skipVoidRecursion=true -setprop cpa.callstack.skipFunctionPointerRecursion=true -witness ../../results-verified/pesco.2018-12-06_1244.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --graphml-witness ../../results-verified/pesco.2018-12-06_1244.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -witness ../../results-verified/pesco.2018-12-06_1244.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/pesco.2018-12-06_1244.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml
sv-benchmarks/c/ status score witness inspect witness cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
heap-manipulation/bubble_sort_linux_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 1 wit inspect 18 5.6 1400 140 .68   0     true -32 wit inspect 6.0 3.3 260 0   0   error (7) 0 --- inspect 20   12   350 .71 0     unknown 0 --- inspect 4.9 2.8  250 0   0   false(unreach-call) 1 --- inspect .68 .68 21 .11  0      - --- inspect - --- inspect
heap-manipulation/dll_of_dll_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 0 wit inspect 58 25   1800 580 8.2    0     true -32 wit inspect 6.4 3.4 260 0   0   error (7) 0 --- inspect 19   11   320 .75 0     unknown 0 --- inspect 5.3 3.0  250 0   0   error (1) 0 --- inspect .60 .62 21 .020 0      - --- inspect - --- inspect
heap-manipulation/merge_sort_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 0 wit inspect 66 28   1700 540 .39   0     true -32 wit inspect 4.9 2.7 250 0   0   error (7) 0 --- inspect 18   10   320 .75 0     unknown 0 --- inspect 4.2 2.4  250 0   0   true -32 --- inspect .64 .64 21 .082 0      - --- inspect - --- inspect
heap-manipulation/sll_to_dll_rev_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 0 wit inspect 17 4.7 1200 110 .10   0     true -32 wit inspect 5.0 2.7 260 0   0   error (7) 0 --- inspect 17   10   320 .75 .025 unknown 0 --- inspect 4.4 2.5  250 0   0   true -32 --- inspect .63 .63 21 .082 0      - --- inspect - --- inspect
heap-manipulation/tree_false-unreach-call_false-valid-deref.i false(unreach-call) 1 wit inspect 22 5.6 1200 160 .066  0     false(unreach-call) 1 wit inspect 5.1 2.8 270 0   0   error (7) 0 --- inspect 17   10   310 .68 0     unknown 0 --- inspect 5.1 2.9  260 0   0   false(unreach-call) 1 --- inspect .63 .63 21 .074 0      - --- inspect - --- inspect
heap-manipulation/tree_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 1 wit inspect 22 5.8 1200 160 .016  0     false(unreach-call) 1 wit inspect 5.5 3.0 270 0   0   error (7) 0 --- inspect 16   9.0 310 .75 0     unknown 0 --- inspect 4.6 2.6  260 0   0   false(unreach-call) 1 --- inspect .66 .65 21 .074 0      - --- inspect - --- inspect
heap-manipulation/bubble_sort_linux_true-unreach-call_true-valid-memsafety.i timeout 0 wit inspect 910 890   2400 7800 .0082 0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    880    1600 0   0   timeout 0 --- inspect 960     930     1100   1.6  0  
heap-manipulation/dancing_true-unreach-call_false-valid-memtrack.i unknown 0 --- inspect 18 5.6 1200 150 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .74 .44 40 0   0   error (2) 0 --- inspect .024 .025 5.6 0    0  
heap-manipulation/dll_of_dll_true-unreach-call_true-valid-memsafety.i false(unreach-call) -16 wit inspect 66 26   2300 590 8.2    0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.4  2.9  250 0   0   error (7) 0 --- inspect 19     11     320   .75 0  
heap-manipulation/merge_sort_true-unreach-call_true-valid-memsafety.i timeout 0 wit inspect 900 810   5600 7400 .0082 0     - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 890    830    7000 0   0   timeout 0 --- inspect 960     910     2800   .70 0  
heap-manipulation/sll_to_dll_rev_true-unreach-call_true-valid-memsafety.i timeout 0 wit inspect 910 860   4100 8900 .012  0     - --- inspect - --- inspect - --- inspect - --- inspect unknown 0 wit inspect 110    96    980 0   0   timeout 0 --- inspect 960     950     730   .62 0  
heap-manipulation/tree_true-unreach-call.i timeout 0 wit inspect 900 880   4300 5800 .012  0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    880    2900 0   0   true 2 --- inspect 23     15     520   .62 0  
list-properties/alternating_list_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 0 wit inspect 19 5.3 1300 140 .045  0     true -32 wit inspect 4.6 2.5 260 0   0   true -32 --- inspect 19   12   620 .62 0     unknown 0 --- inspect 4.1 2.4  250 0   0   true -32 --- inspect .64 .64 21 .066 0      - --- inspect - --- inspect
list-properties/list_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 0 wit inspect 21 5.8 1300 150 .18   0     unknown 0 wit inspect 4.5 2.5 260 0   0   true -32 --- inspect 18   11   590 .10 0     unknown 0 --- inspect 4.4 2.5  250 0   0   true -32 --- inspect .63 .63 21 .066 .025  - --- inspect - --- inspect
list-properties/list_flag_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 1 wit inspect 13 4.1 1200 100 0      0     false(unreach-call) 1 wit inspect 4.8 2.7 260 0   0   false(unreach-call) 1 --- inspect 8.7 4.8 310 .62 0     unknown 0 --- inspect 4.5 2.6  260 0   0   false(unreach-call) 1 --- inspect .62 .63 21 .066 0      - --- inspect - --- inspect
list-properties/list_search_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 1 wit inspect 19 5.0 1200 130 .020  0     false(unreach-call) 1 wit inspect 6.7 3.7 280 0   0   timeout (false(unreach-call)) 0 --- inspect 96   86   560 .62 0     unknown 0 --- inspect 4.5 2.6  260 0   0   false(unreach-call) 1 --- inspect .63 .63 21 .070 .025  - --- inspect - --- inspect
list-properties/simple_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 0 wit inspect 14 4.2 1300 110 .033  0     unknown 0 wit inspect 4.6 2.5 250 0   0   true -32 --- inspect 18   12   570 .62 0     unknown 0 --- inspect 4.0 2.4  250 0   0   true -32 --- inspect .64 .64 20 .066 0      - --- inspect - --- inspect
list-properties/splice_false-unreach-call_false-valid-memcleanup.i false(unreach-call) 0 wit inspect 21 5.4 1200 160 .057  0     true -32 wit inspect 5.0 2.7 260 0   0   timeout 0 --- inspect 97   72   1000 1.5  0     unknown 0 --- inspect 5.4 3.1  250 0   0   true -32 --- inspect .63 .62 20 .070 0      - --- inspect - --- inspect
list-properties/alternating_list_true-unreach-call_true-valid-memsafety.i timeout 0 wit inspect 900 880   3400 7000 .0082 0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    3100 0   0   timeout 0 --- inspect 960     920     1000   .64 0  
list-properties/list_flag_true-unreach-call_false-valid-memtrack.i timeout 0 wit inspect 900 890   2600 6600 .0082 0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    1900 0   0   timeout 0 --- inspect 960     900     1600   .77 0  
list-properties/list_search_true-unreach-call_false-valid-memcleanup.i true 2 wit inspect 28 8.0 1300 220 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 28    17    650 0   0   true 2 --- inspect 130     110     810   .62 0  
list-properties/list_true-unreach-call_false-valid-memtrack.i timeout 0 wit inspect 900 870   3500 7000 .0082 0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    880    3800 0   0   timeout 0 --- inspect 960     930     1000   .64 0  
list-properties/simple_built_from_end_true-unreach-call_false-valid-memtrack.i timeout 0 wit inspect 900 890   3200 6100 .0082 0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    1800 0   0   timeout 0 --- inspect 960     930     1400   .63 0  
list-properties/simple_true-unreach-call_false-valid-memtrack.i timeout 0 wit inspect 900 880   2800 6800 .0082 0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    2000 0   0   timeout 0 --- inspect 960     930     1100   .65 0  
list-properties/splice_true-unreach-call_false-valid-memtrack.i timeout 0 wit inspect 910 870   4400 5200 0      0     - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    880    4100 0   0   timeout 0 --- inspect 960     890     1300   1.6  0  
ldv-regression/1_3_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 14 3.9 1100 100 .016  0     false(unreach-call) 1 wit inspect 3.9 2.2 250 0   0   false(unreach-call) 1 --- inspect 7.3 4.1 310 .62 0     false(unreach-call) 1 --- inspect 3.6 2.1  240 0   0   false(unreach-call) 1 --- inspect .58 .57 20 .057 0      - --- inspect - --- inspect
ldv-regression/alt_test_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 16 4.4 1200 110 .012  0     false(unreach-call) 1 wit inspect 5.1 2.8 250 0   0   false(unreach-call) 1 --- inspect 9.9 5.9 330 .66 0     unknown 0 --- inspect 4.4 2.5  250 0   0   false(unreach-call) 1 --- inspect .66 .66 20 .086 0      - --- inspect - --- inspect
ldv-regression/callfpointer_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 14 4.0 1100 110 .0082 0     false(unreach-call) 1 wit inspect 3.7 2.1 250 0   0   false(unreach-call) 1 --- inspect 6.9 3.9 310 .66 0     false(unreach-call) 1 --- inspect 3.5 2.1  250 0   0   false(unreach-call) 1 --- inspect .56 .56 20 .045 0      - --- inspect - --- inspect
ldv-regression/fo_test_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 14 4.4 1200 120 .0082 0     false(unreach-call) 1 wit inspect 5.2 2.9 250 0   0   unknown 0 --- inspect 16   9.4 310 .75 0     unknown 0 --- inspect 4.2 2.5  250 0   0   false(unreach-call) 1 --- inspect .64 .64 20 .074 0      - --- inspect - --- inspect
ldv-regression/mutex_lock_int_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 12 3.6 1200 87 .016  0     false(unreach-call) 1 wit inspect 3.9 2.2 250 0   0   false(unreach-call) 1 --- inspect 7.2 4.3 310 .66 0     false(unreach-call) 1 --- inspect 3.7 2.2  250 0   0   false(unreach-call) 1 --- inspect .59 .59 20 .049 0      - --- inspect - --- inspect
ldv-regression/mutex_lock_struct_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 12 3.7 1200 84 .016  0     false(unreach-call) 1 wit inspect 3.9 2.2 250 0   0   false(unreach-call) 1 --- inspect 8.4 5.1 300 .66 0     false(unreach-call) 1 --- inspect 4.5 2.6  250 0   0   false(unreach-call) 1 --- inspect .58 .58 20 .045 0      - --- inspect - --- inspect
ldv-regression/recursive_list_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 14 4.2 1100 100 .0082 0     false(unreach-call) 1 wit inspect 4.1 2.3 250 0   0   false(unreach-call) 1 --- inspect 7.6 4.7 320 .62 0     false(unreach-call) 1 --- inspect 4.7 2.7  250 0   0   false(unreach-call) 1 --- inspect .57 .57 20 .049 0      - --- inspect - --- inspect
ldv-regression/rule57_ebda_blast_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 16 4.3 1200 100 .012  0     false(unreach-call) 1 wit inspect 4.7 2.6 260 0   0   false(unreach-call) 1 --- inspect 8.4 4.8 310 .66 0     unknown 0 --- inspect 4.0 2.3  250 0   0   false(unreach-call) 1 --- inspect .61 .61 21 .066 0      - --- inspect - --- inspect
ldv-regression/rule60_list2_true-termination.c_false-unreach-call_1.i false(unreach-call) 1 wit inspect 15 4.5 1200 110 .016  0     false(unreach-call) 1 wit inspect 5.0 2.8 260 0   0   false(unreach-call) 1 --- inspect 12   7.1 480 .66 0     exception 0 --- inspect 4.2 2.4  250 0   0   true -32 --- inspect .66 .66 21 .078 0      - --- inspect - --- inspect
ldv-regression/stateful_check_false-unreach-call_false-termination.i false(unreach-call) 1 wit inspect 15 4.3 1100 110 .025  0     false(unreach-call) 1 wit inspect 4.6 2.5 260 0   0   false(unreach-call) 1 --- inspect 8.2 4.9 310 .66 0     unknown 0 --- inspect 4.4 2.5  250 0   0   true -32 --- inspect .59 .62 21 .057 0      - --- inspect - --- inspect
ldv-regression/test_while_int_true-termination.c_false-unreach-call.i false(unreach-call) 1 wit inspect 14 3.9 1100 91 .012  0     false(unreach-call) 1 wit inspect 4.9 2.7 260 0   0   false(unreach-call) 1 --- inspect 6.6 3.8 290 .66 0     false(unreach-call) 1 --- inspect 4.4 2.5  250 0   0   false(unreach-call) 1 --- inspect .56 .56 21 .045 0      - --- inspect - --- inspect
ldv-regression/test_while_int_true-termination.c_false-unreach-call_1.i false(unreach-call) 1 wit inspect 13 3.9 1100 90 .012  0     false(unreach-call) 1 wit inspect 4.3 2.4 250 0   0   false(unreach-call) 1 --- inspect 6.6 3.8 290 .62 0     false(unreach-call) 1 --- inspect 3.7 2.1  250 0   0   false(unreach-call) 1 --- inspect .56 .56 20 .045 .0041 - --- inspect - --- inspect
ldv-regression/alias_of_return_2_true-termination.c_true-unreach-call.i true 2 wit inspect 12 3.6 1100 83 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.8  2.2  250 0   0   true 2 --- inspect 7.9   4.9   320   .66 0  
ldv-regression/alias_of_return_2_true-termination.c_true-unreach-call_1.i true 2 wit inspect 13 3.7 1100 90 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.8  2.6  250 0   0   true 2 --- inspect 8.9   5.2   310   .66 0  
ldv-regression/alias_of_return_true-termination.c_true-unreach-call.i true 2 wit inspect 13 3.6 1100 97 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.4  2.5  250 0   0   true 2 --- inspect 7.7   4.3   310   .66 0  
ldv-regression/alias_of_return_true-termination.c_true-unreach-call_1.i true 2 wit inspect 13 3.6 1000 97 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.2  2.4  250 0   0   true 2 --- inspect 7.5   4.3   300   .66 0  
ldv-regression/ex3_forlist_true-termination.c_true-unreach-call.i true 2 wit inspect 14 3.9 1200 98 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 17    11    510 0   0   true 2 --- inspect 38     25     600   .66 0  
ldv-regression/just_assert_true-termination.c_true-unreach-call.i true 2 wit inspect 12 3.6 1000 78 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.6  2.0  250 0   0   true 2 --- inspect 6.7   3.8   300   .66 0  
ldv-regression/mutex_lock_int_true-termination.c_true-unreach-call_1.i true 2 wit inspect 12 3.6 1200 94 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.8  2.1  250 0   0   true 2 --- inspect 8.3   5.0   310   .66 0  
ldv-regression/mutex_lock_struct_true-termination.c_true-unreach-call_1.i true 2 --- inspect 14 3.7 1100 96 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .61 .38 42 0   0   error (2) 0 --- inspect .021 .022 5.6 0    0  
ldv-regression/nested_structure_noptr_true-termination.c_true-unreach-call.i true 2 wit inspect 13 3.7 1000 92 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.5  2.0  250 0   0   true 2 --- inspect 7.5   4.6   310   .66 0  
ldv-regression/nested_structure_noptr_true-unreach-call_true-termination.i true 2 wit inspect 13 3.7 1000 89 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.5  1.9  250 0   0   true 2 --- inspect 7.7   4.4   320   .66 0  
ldv-regression/nested_structure_ptr_true-termination.c_true-unreach-call.i true 2 wit inspect 13 3.7 1100 87 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.6  2.0  250 0   0   true 2 --- inspect 7.6   4.7   310   .66 0  
ldv-regression/nested_structure_ptr_true-unreach-call_true-termination.i true 2 wit inspect 11 3.4 1200 84 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.2  2.3  250 0   0   true 2 --- inspect 9.1   5.5   310   .62 0  
ldv-regression/nested_structure_true-termination.c_true-unreach-call.i true 2 wit inspect 13 3.7 1100 86 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.5  2.5  250 0   0   true 2 --- inspect 7.8   4.8   310   .66 0  
ldv-regression/nested_structure_true-unreach-call_true-termination.i true 2 wit inspect 13 3.6 1100 91 0      .090 - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.6  2.0  250 0   0   true 2 --- inspect 7.8   4.5   320   .66 0  
ldv-regression/oomInt_true-termination.c_true-unreach-call.i true 2 wit inspect 11 3.5 1200 81 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.5  2.5  250 0   0   true 2 --- inspect 8.1   4.6   320   .66 0  
ldv-regression/oomInt_true-termination.c_true-unreach-call_1.i true 2 wit inspect 11 3.5 1200 81 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.6  2.0  250 0   0   true 2 --- inspect 7.4   4.7   320   .66 0  
ldv-regression/rule57_ebda_blast_true-termination.c_true-unreach-call_1.i true 2 wit inspect 13 3.7 1100 95 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.1  2.8  260 0   0   true 2 --- inspect 8.8   5.4   330   .66 0  
ldv-regression/rule60_list2_true-termination.c_true-unreach-call.i true 2 wit inspect 14 4.1 1200 97 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.6  2.6  260 0   0   true 2 --- inspect 23     15     650   .66 0  
ldv-regression/rule60_list_true-termination.c_true-unreach-call.i true 2 --- inspect 14 4.0 1200 110 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .62 .39 42 0   0   error (2) 0 --- inspect .021 .022 5.6 0    0  
ldv-regression/sizeofparameters_test_true-termination.c_true-unreach-call.i true 2 wit inspect 12 3.7 1200 93 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.7  2.6  250 0   0   true 2 --- inspect 8.3   4.7   310   .66 0  
ldv-regression/structure_assignment_true-termination.c_true-unreach-call.i true 2 wit inspect 13 3.7 1100 89 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.9  2.2  250 0   0   true 2 --- inspect 6.7   3.9   300   .66 0  
ldv-regression/test_address_true-termination.c_true-unreach-call.i true 2 --- inspect 13 3.8 1200 94 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .73 .45 40 0   0   error (2) 0 --- inspect .021 .022 5.7 0    0  
ldv-regression/test_cut_trace_true-termination.c_true-unreach-call.i true 2 wit inspect 12 3.5 1000 79 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.4  2.5  250 0   0   true 2 --- inspect 8.0   4.5   310   .66 0  
ldv-regression/test_malloc-1_true-unreach-call_true-termination.i true 2 wit inspect 14 4.0 1100 110 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.1  2.8  250 0   0   true 2 --- inspect 8.6   4.7   310   .66 0  
ldv-regression/test_malloc-2_true-unreach-call_true-termination.i true 2 --- inspect 14 3.9 1200 94 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .63 .39 40 0   0   error (2) 0 --- inspect .020 .022 5.7 0    0  
ldv-regression/test_overflow_true-termination.c_true-unreach-call.i true 2 wit inspect 14 4.1 1100 99 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.6  3.1  260 0   0   true 2 --- inspect 8.2   4.9   320   .66 0  
ldv-regression/test_union_cast-1_true-unreach-call_true-termination.i true 2 wit inspect 13 3.7 1000 92 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.3  2.4  250 0   0   true 2 --- inspect 7.2   4.1   310   .66 0  
ldv-regression/test_union_cast-2_true-unreach-call_true-termination.i true 2 wit inspect 14 3.8 1100 100 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.9  2.1  250 0   0   true 2 --- inspect 7.6   4.3   310   .66 0  
ldv-regression/test_union_cast_true-termination.c_true-unreach-call.i true 2 wit inspect 11 3.5 1200 95 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.5  2.5  250 0   0   true 2 --- inspect 7.2   4.5   300   .66 0  
ldv-regression/test_union_cast_true-termination.c_true-unreach-call_1.i true 2 wit inspect 12 3.6 1000 86 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.5  2.0  250 0   0   true 2 --- inspect 7.8   4.4   310   .62 0  
ldv-regression/test_union_true-termination.c_true-unreach-call.i true 2 wit inspect 11 3.3 1200 75 0      .090 - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.2  2.4  250 0   0   true 2 --- inspect 7.5   4.5   300   .66 0  
ldv-regression/test_union_true-termination.c_true-unreach-call_1.i true 2 wit inspect 13 3.6 1000 84 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.0  2.8  250 0   0   true 2 --- inspect 8.3   4.9   300   .66 0  
ldv-regression/volatile_alias_true-termination.c_true-unreach-call.i true 2 wit inspect 14 3.7 1100 92 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.8  2.1  250 0   0   true 2 --- inspect 8.4   4.7   310   .66 0  
ldv-regression/volatile_alias_true-termination.c_true-unreach-call_1.i true 2 wit inspect 13 3.7 1100 96 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.5  2.5  250 0   0   true 2 --- inspect 7.2   4.6   310   .66 0  
ldv-regression/test02_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 14 4.1 1100 89 .0041 0     false(unreach-call) 1 wit inspect 4.5 2.5 250 0   0   false(unreach-call) 1 --- inspect 7.0 3.9 300 .66 0     false(unreach-call) 1 --- inspect 4.1 2.4  250 0   0   false(unreach-call) 1 --- inspect .57 .57 20 .045 .0041 - --- inspect - --- inspect
ldv-regression/test06_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 14 4.1 1100 99 .0082 0     false(unreach-call) 1 wit inspect 4.0 2.3 250 0   0   false(unreach-call) 1 --- inspect 7.5 4.3 310 .62 0     false(unreach-call) 1 --- inspect 3.6 2.1  250 0   0   false(unreach-call) 1 --- inspect .60 .60 20 .057 0      - --- inspect - --- inspect
ldv-regression/test08_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 13 3.9 1100 96 .0082 0     false(unreach-call) 1 wit inspect 3.9 2.1 250 0   0   false(unreach-call) 1 --- inspect 7.4 4.2 310 .66 0     false(unreach-call) 1 --- inspect 3.5 2.1  250 0   0   false(unreach-call) 1 --- inspect .57 .57 20 .045 0      - --- inspect - --- inspect
ldv-regression/test12_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 13 4.0 1100 88 .0041 0     false(unreach-call) 1 wit inspect 4.2 2.3 250 0   0   false(unreach-call) 1 --- inspect 7.2 4.5 310 .66 0     false(unreach-call) 1 --- inspect 3.8 2.2  240 0   0   false(unreach-call) 1 --- inspect .57 .57 20 .045 0      - --- inspect - --- inspect
ldv-regression/test21_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 14 3.8 1100 92 .012  0     false(unreach-call) 1 wit inspect 4.1 2.3 250 0   0   false(unreach-call) 1 --- inspect 7.4 4.2 310 .62 0     false(unreach-call) 1 --- inspect 3.8 2.2  250 0   0   false(unreach-call) 1 --- inspect .58 .58 21 .057 0      - --- inspect - --- inspect
ldv-regression/test22_false-unreach-call.c false(unreach-call) 1 wit inspect 14 4.0 1100 100 .012  0     false(unreach-call) 1 wit inspect 4.2 2.4 260 0   0   false(unreach-call) 1 --- inspect 12   7.2 410 .66 0     unknown 0 --- inspect 4.8 2.7  250 0   0   true -32 --- inspect 2.2  2.2  20 .057 0      - --- inspect - --- inspect
ldv-regression/test23_false-unreach-call.c false(unreach-call) 1 wit inspect 16 4.9 1200 120 .020  0     false(unreach-call) 1 wit inspect 4.9 2.7 260 0   0   timeout 0 --- inspect 98   61   6500 1.7  0     unknown 0 --- inspect 4.5 2.6  250 0   0   true -32 --- inspect .65 .65 21 .057 0      - --- inspect - --- inspect
ldv-regression/test24_false-unreach-call.c false(unreach-call) 1 wit inspect 14 4.4 1100 110 .029  0     false(unreach-call) 1 wit inspect 5.8 3.4 270 0   0   out of memory 0 --- inspect 89   57   7000 1.5  0     unknown 0 --- inspect 3.9 2.2  250 0   0   true -32 --- inspect .60 .60 21 .057 0      - --- inspect - --- inspect
ldv-regression/test25_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 19 6.6 1300 150 .25   0     false(unreach-call) 1 wit inspect 6.2 3.5 280 0   0   false(unreach-call) 1 --- inspect 31   19   820 .62 0     unknown 0 --- inspect 4.1 2.4  250 0   0   true -32 --- inspect .63 .63 21 .057 0      - --- inspect - --- inspect
ldv-regression/test26_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 12 3.6 1200 89 .0082 0     false(unreach-call) 1 wit inspect 3.9 2.2 250 0   0   false(unreach-call) 1 --- inspect 7.3 4.5 300 .66 0     false(unreach-call) 1 --- inspect 4.0 2.3  250 0   0   false(unreach-call) 1 --- inspect .57 .57 20 .045 0      - --- inspect - --- inspect
ldv-regression/test27_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 13 4.1 1200 98 .016  0     false(unreach-call) 1 wit inspect 4.8 2.7 270 0   0   out of memory 0 --- inspect 83   53   7000 1.7  0     unknown 0 --- inspect 3.9 2.3  250 0   0   error (2) 0 --- inspect .60 .61 21 .057 0      - --- inspect - --- inspect
ldv-regression/test28_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 13 3.9 1100 110 .0082 0     false(unreach-call) 1 wit inspect 4.4 2.5 250 0   0   false(unreach-call) 1 --- inspect 8.8 5.3 310 .66 0     true -32 --- inspect 3.7 2.1  250 0   0   false(unreach-call) 1 --- inspect .57 .57 20 .049 0      - --- inspect - --- inspect
ldv-regression/test29_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 13 3.8 1100 95 .0082 0     false(unreach-call) 1 wit inspect 4.1 2.3 250 0   0   false(unreach-call) 1 --- inspect 8.9 5.0 320 .62 0     false(unreach-call) 1 --- inspect 3.7 2.2  240 0   0   false(unreach-call) 1 --- inspect .59 .59 20 .049 0      - --- inspect - --- inspect
ldv-regression/test30_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 12 3.6 1200 91 .0082 0     false(unreach-call) 1 wit inspect 4.0 2.3 260 0   0   false(unreach-call) 1 --- inspect 8.7 4.8 310 .62 0     false(unreach-call) 1 --- inspect 3.7 2.1  250 0   0   false(unreach-call) 1 --- inspect .57 .57 20 .049 0      - --- inspect - --- inspect
ldv-regression/test01_true-unreach-call_true-termination.c true 2 wit inspect 13 3.7 1100 88 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.4  2.4  250 0   0   true 2 --- inspect 6.6   4.2   300   .62 0  
ldv-regression/test03_true-unreach-call_true-termination.c true 2 wit inspect 13 3.7 1100 85 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.8  2.1  250 0   0   true 2 --- inspect 7.7   4.4   310   .66 0  
ldv-regression/test04_true-unreach-call_true-termination.c true 2 wit inspect 11 3.5 1200 90 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.9  2.2  250 0   0   true 2 --- inspect 8.9   5.4   310   .66 0  
ldv-regression/test05_true-unreach-call_true-termination.c true 2 --- inspect 14 3.8 1100 90 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .69 .43 41 0   0   error (2) 0 --- inspect .021 .023 5.6 0    0  
ldv-regression/test07_true-unreach-call_true-termination.c true 2 wit inspect 12 3.6 1200 84 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.0  2.2  260 0   0   true 2 --- inspect 9.8   5.5   320   .66 0  
ldv-regression/test09_true-unreach-call_true-termination.c true 2 wit inspect 13 3.7 1100 94 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.7  2.6  260 0   0   true 2 --- inspect 10     6.1   320   .66 0  
ldv-regression/test10_true-unreach-call_true-termination.c true 2 --- inspect 14 3.7 1100 93 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .73 .44 42 0   0   error (2) 0 --- inspect .021 .022 5.6 0    0  
ldv-regression/test11_true-unreach-call_true-termination.c true 2 --- inspect 14 3.8 1100 89 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .81 .49 42 0   0   error (2) 0 --- inspect .021 .022 5.7 0    0  
ldv-regression/test13_true-unreach-call_true-termination.c true 2 wit inspect 13 3.6 1100 100 0      .049 - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.5  2.6  250 0   0   true 2 --- inspect 7.5   4.2   300   .66 0  
ldv-regression/test14_true-unreach-call_true-termination.c true 2 wit inspect 13 3.8 1100 86 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.7  2.6  260 0   0   true 2 --- inspect 8.4   4.8   310   .66 0  
ldv-regression/test15_true-unreach-call_true-termination.c true 2 wit inspect 12 3.6 1200 80 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.2  2.3  250 0   0   true 2 --- inspect 7.8   4.4   310   .62 0  
ldv-regression/test16_true-unreach-call_true-termination.c true 2 wit inspect 12 3.5 1200 86 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.5  1.9  250 0   0   true 2 --- inspect 8.0   4.6   320   .66 0  
ldv-regression/test17_true-unreach-call_true-termination.c true 2 wit inspect 13 3.7 1100 96 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.8  2.6  250 0   0   true 2 --- inspect 8.5   5.1   310   .66 0  
ldv-regression/test18_true-unreach-call_true-termination.c true 2 --- inspect 13 3.6 1100 91 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .66 .40 40 0   0   error (2) 0 --- inspect .025 .026 5.6 0    0  
ldv-regression/test19_true-unreach-call_true-termination.c true 2 --- inspect 13 3.6 1100 88 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .67 .41 41 0   0   error (2) 0 --- inspect .025 .025 5.6 0    0  
ldv-regression/test20_true-unreach-call_true-termination.c true 2 wit inspect 12 3.4 1200 83 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.9  2.2  250 0   0   true 2 --- inspect 7.5   4.6   300   .66 0  
ldv-regression/test21_true-unreach-call_true-termination.c true 2 --- inspect 14 3.8 1100 95 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .70 .43 40 0   0   error (2) 0 --- inspect .026 .027 5.7 0    0  
ldv-regression/test22_true-unreach-call.c true 2 wit inspect 20 5.1 1300 130 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 11    6.1  330 0   0   true 2 --- inspect 23     14     490   .66 0  
ldv-regression/test23_true-unreach-call.c true 2 wit inspect 16 4.8 1200 120 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 10    6.1  330 0   0   true 2 --- inspect 67     55     590   .62 0  
ldv-regression/test24_true-unreach-call_true-termination.c true 2 wit inspect 13 4.1 1200 100 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.1  5.0  300 0   0   true 2 --- inspect 29     24     500   .66 0  
ldv-regression/test25_true-unreach-call.c true 2 wit inspect 20 6.7 1300 170 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 18    12    490 0   0   true 2 --- inspect 28     20     500   .66 0  
ldv-regression/test26_true-unreach-call_true-termination.c true 2 wit inspect 12 3.6 1200 82 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.5  1.9  250 0   0   true 2 --- inspect 8.7   4.9   310   .66 0  
ldv-regression/test27_true-unreach-call_true-termination.c true 2 wit inspect 26 13   1300 210 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 39    30    550 0   0   true 2 --- inspect 92     76     860   .62 0  
ldv-regression/test28_true-unreach-call_true-termination.c true 2 --- inspect 14 3.7 1100 93 0      0     - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .65 .41 41 0   0   error (2) 0 --- inspect .020 .021 5.6 0    0  
ldv-regression/test29_true-unreach-call_true-termination.c true 2 wit inspect 13 3.7 1100 98 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.1  2.3  250 0   0   true 2 --- inspect 8.5   4.9   310   .66 0  
ldv-regression/test30_true-unreach-call_true-termination.c true 2 wit inspect 14 3.8 1100 84 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.5  2.5  250 0   0   true 2 --- inspect 9.8   5.5   320   .66 0  
ddv-machzwd/ddv_machzwd_all_false-unreach-call_true-valid-memsafety.i false(unreach-call) 1 wit inspect 27 11   1300 240 .029  0     false(unreach-call) 1 wit inspect 14   8.5 440 0   0   error (7) 0 --- inspect 28   16   520 .68 0     unknown 0 --- inspect 6.8 3.8  280 0   0   false(unreach-call) 1 --- inspect 1.1  1.1  21 .50  0      - --- inspect - --- inspect
ddv-machzwd/ddv_machzwd_inw_false-unreach-call_true-valid-memsafety.i false(unreach-call) 1 wit inspect 25 10   1300 240 .029  0     false(unreach-call) 1 wit inspect 12   7.4 410 0   0   error (7) 0 --- inspect 30   17   520 .68 0     unknown 0 --- inspect 6.4 3.6  280 0   0   false(unreach-call) 1 --- inspect 1.1  1.1  21 .50  0      - --- inspect - --- inspect
ddv-machzwd/ddv_machzwd_outb_false-unreach-call_true-valid-memsafety.i false(unreach-call) 1 wit inspect 25 11   1200 230 .029  0     false(unreach-call) 1 wit inspect 13   8.0 410 0   0   error (7) 0 --- inspect 29   16   520 .75 0     unknown 0 --- inspect 6.3 3.5  280 0   0   false(unreach-call) 1 --- inspect 1.1  1.1  21 .50  .086  - --- inspect - --- inspect
ddv-machzwd/ddv_machzwd_inb_p_true-unreach-call_false-valid-memtrack.i true 2 wit inspect 20 8.6 1200 170 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.8  5.2  430 0   0   error (7) 0 --- inspect 30     17     540   .75 0  
ddv-machzwd/ddv_machzwd_inb_true-unreach-call_false-valid-memtrack.i true 2 wit inspect 20 8.6 1200 190 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.1  4.8  430 0   0   error (7) 0 --- inspect 28     16     520   .75 0  
ddv-machzwd/ddv_machzwd_inl_p_true-unreach-call_false-valid-memtrack.i true 2 wit inspect 22 8.7 1100 210 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.9  5.2  420 0   0   error (7) 0 --- inspect 29     16     520   .68 0  
ddv-machzwd/ddv_machzwd_inl_true-unreach-call_false-valid-memtrack.i true 2 wit inspect 21 8.6 1200 190 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 11    5.5  440 0   0   error (7) 0 --- inspect 31     17     540   .75 0  
ddv-machzwd/ddv_machzwd_inw_p_true-unreach-call_false-valid-memtrack.i true 2 wit inspect 21 8.6 1200 180 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.1  4.8  420 0   0   error (7) 0 --- inspect 30     17     520   .75 0  
ddv-machzwd/ddv_machzwd_outb_p_true-unreach-call_false-valid-memtrack.i true 2 wit inspect 21 8.8 1200 170 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 11    5.7  420 0   0   error (7) 0 --- inspect 31     17     530   .75 0  
ddv-machzwd/ddv_machzwd_outl_p_true-unreach-call_false-valid-memtrack.i true 2 wit inspect 21 8.6 1200 180 0      0     - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 12    6.2  430 0   0   error (7) 0 --- inspect 28     16     520   .75 0  
ddv-machzwd/ddv_machzwd_outl_true-unreach-call_false-valid-memtrack.i true 2 wit