Tool ESBMC version 6.0.0 64-bit x86_64 linux CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a CPA-witness2test 1.7-svn 29852 CProver witness2test 0.1 CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 90 s, memlimit: 7000 MB, CPU core limit: 2 timelimit: 900 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon* [apollon004; apollon069; apollon137; apollon154] apollon*
OS Linux 4.15.0-42-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33546 MB
Date of execution 2018-12-06 11:03:31 CET 2018-12-08 04:49:09 CET 2018-12-08 07:45:10 CET 2018-12-08 09:00:44 CET 2018-12-12 20:28:15 CET 2018-12-08 02:16:29 CET 2018-12-08 05:09:23 CET
Run set esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors
Options -s kinduction -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -setprop cpa.smg.memoryAllocationFunctions=malloc,__kmalloc,kmalloc,kzalloc,kzalloc_node,ldv_zalloc,ldv_malloc -setprop cpa.smg.arrayAllocationFunctions=calloc,kmalloc_array,kcalloc -setprop cpa.smg.zeroingMemoryAllocation=calloc,kzalloc,kcalloc,kzalloc_node,ldv_zalloc -setprop cpa.smg.deallocationFunctions=free,kfree,kfree_const -witness ../../results-verified/esbmc-kind.2018-12-06_1103.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/esbmc-kind.2018-12-06_1103.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop analysis.summaryEdges=true -setprop cpa.callstack.skipVoidRecursion=true -setprop cpa.callstack.skipFunctionPointerRecursion=true -witness ../../results-verified/esbmc-kind.2018-12-06_1103.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --graphml-witness ../../results-verified/esbmc-kind.2018-12-06_1103.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -witness ../../results-verified/esbmc-kind.2018-12-06_1103.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/esbmc-kind.2018-12-06_1103.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml
sv-benchmarks/c/ status score witness inspect witness cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
bitvector/byte_add_false-unreach-call_true-no-overflow_true-termination.i 1 .13  .13  27 1.1  1.0  0   1 4.7  2.6  260 0   0   1 45     27     620   .68 0   1 4.7  2.7  260 0   0   1 .62   .61   20    .057 0      - -
bitvector/sum02_false-unreach-call_true-no-overflow.i 0 900     900     910 12000    1.0  0   0 .65 .40 41 0   0   0 .025 .027 5.6 0    0   0 .93 .60 47 0   0   0 .0020 .0025 .52 0     0      - -
bitvector/byte_add_1_true-unreach-call_true-no-overflow_true-termination.i 2 .26  .26  27 3.2  1.0  0   - - - - 2 9.2  4.9  370 0   0   0 960     920     980   .70 0  
bitvector/byte_add_2_true-unreach-call_true-no-overflow_true-termination.i 2 .28  .28  27 3.7  1.0  0   - - - - 2 11    5.8  370 0   0   0 960     930     1000   .72 0  
bitvector/gcd_1_true-unreach-call_true-no-overflow.i 2 .87  .87  28 11    .85 0   - - - - 2 11    8.7  320 0   0   0 960     950     3000   .63 0  
bitvector/gcd_2_true-unreach-call_true-no-overflow.i 2 26     26     46 340    .85 0   - - - - 2 160    160    560 0   0   0 960     950     870   .66 0  
bitvector/gcd_3_true-unreach-call_true-no-overflow.i 2 28     28     43 430    1.0  0   - - - - 2 120    120    560 0   0   0 960     940     1700   .83 0  
bitvector/gcd_4_true-unreach-call_true-no-overflow_true-termination.i 2 .53  .53  32 6.9  1.0  0   - - - - 2 7.5  4.9  320 0   0   0 960     940     1500   .65 0  
bitvector/interleave_bits_true-unreach-call_true-no-overflow.i 2 .11  .11  26 1.2  1.0  0   - - - - 2 11    7.4  390 0   0   2 190     180     640   .71 0  
bitvector/jain_1_true-unreach-call_true-no-overflow_false-termination.i 0 900     900     1500 11000    1.0  0   - - - - 0 .62 .39 41 0   0   0 .021 .021 5.6 0    0  
bitvector/jain_2_true-unreach-call_true-no-overflow_false-termination.i 0 900     900     980 12000    1.0  0   - - - - 0 .77 .47 41 0   0   0 .029 .030 5.6 0    0  
bitvector/jain_4_true-unreach-call_true-no-overflow_false-termination.i 0 900     900     860 11000    1.0  0   - - - - 0 .77 .48 41 0   0   0 .027 .029 5.6 0    0  
bitvector/jain_5_true-unreach-call_true-no-overflow.i 0 900     890     13000 10000    1.0  0   - - - - 0 .76 .46 40 0   0   0 .024 .025 5.6 0    0  
bitvector/jain_6_true-unreach-call_true-no-overflow_false-termination.i 0 900     900     870 9200    .86 0   - - - - 0 .73 .44 41 0   0   0 .021 .022 5.6 0    0  
bitvector/jain_7_true-unreach-call_true-no-overflow_false-termination.i 0 900     900     1300 11000    1.0  0   - - - - 0 .70 .43 41 0   0   0 .026 .027 5.6 0    0  
bitvector/modulus_true-unreach-call_true-no-overflow.i 2 190     190     280 2100    1.0  0   - - - - 2 18    15    340 0   0   2 18     12     370   .66 0  
bitvector/num_conversion_1_true-unreach-call_true-no-overflow.i 2 .11  .11  26 1.4  .85 0   - - - - 2 5.9  3.2  280 0   0   2 35     22     550   .75 0  
bitvector/num_conversion_2_true-unreach-call_true-no-overflow.i 2 .11  .11  26 1.3  1.0  0   - - - - 2 5.4  3.0  290 0   0   0 960     930     2200   .73 0  
bitvector/parity_true-unreach-call_true-no-overflow.i 2 6.8   6.8   28 80    1.0  0   - - - - 2 33    24    480 0   0   0 960     940     1100   .75 0  
bitvector/sum02_true-unreach-call_true-no-overflow.i 0 900     900     870 14000    .98 0   - - - - 0 .61 .38 41 0   0   0 .021 .021 5.6 0    0  
bitvector/s3_clnt_1_false-unreach-call_true-no-overflow.BV.c.cil.c 1 4.2   4.2   89 54    .85 0   1 6.4  3.5  270 0   0   -32 9.3   5.3   310   .66 0   0 5.5  3.0  270 0   0   -32 .62   .62   21    .12  0      - -
bitvector/s3_clnt_2_false-unreach-call_true-no-overflow.BV.c.cil.c 1 4.6   4.6   97 56    1.0  0   1 6.5  3.5  280 0   0   -32 8.8   5.0   320   .62 0   0 5.7  3.2  280 0   0   -32 .63   .63   21    .11  0      - -
bitvector/s3_clnt_3_false-unreach-call_true-no-overflow.BV.c.cil.c 1 1.7   1.7   57 21    1.0  0   1 5.6  3.1  260 0   0   -32 8.5   5.2   320   .62 0   0 5.3  3.0  260 0   0   -32 .63   .63   20    .11  0      - -
bitvector/s3_clnt_1_true-unreach-call_true-no-overflow.BV.c.cil.c 2 21     21     190 280    1.0  0   - - - - 2 88    78    1000 0   0   2 47     28     800   .75 0  
bitvector/s3_clnt_2_true-unreach-call_true-no-overflow.BV.c.cil.c 2 11     11     160 170    .85 0   - - - - 2 17    10    600 0   0   2 52     29     990   .75 0  
bitvector/s3_clnt_3_true-unreach-call_true-no-overflow.BV.c.cil.c 2 10     10     160 120    .85 0   - - - - 2 14    8.3  550 0   0   2 31     17     740   .62 0  
bitvector/s3_srvr_1_alt_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900     900     370 11000    1.0  0   - - - - 0 .61 .38 40 0   0   0 .028 .029 5.6 0    0  
bitvector/s3_srvr_1_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900     900     2600 8700    .86 0   - - - - 0 .59 .36 40 0   0   0 .026 .028 5.6 0    0  
bitvector/s3_srvr_2_alt_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c 0 900     900     2300 9200    1.0  0   - - - - 0 .63 .39 41 0   0   0 .024 .024 5.6 0    0  
bitvector/s3_srvr_2_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c 0 900     900     2300 8700    1.0  0   - - - - 0 .71 .45 40 0   0   0 .023 .024 5.6 0    0  
bitvector/s3_srvr_3_alt_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900     900     1800 13000    .86 0   - - - - 0 .81 .50 41 0   0   0 .026 .027 5.6 0    0  
bitvector/s3_srvr_3_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900     900     1900 11000    1.0  0   - - - - 0 .76 .46 41 0   0   0 .026 .027 5.6 0    0  
bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c 2 .53  .54  28 6.9  1.0  0   - - - - 0 900    860    5200 0   0   2 150     120     750   .71 0  
bitvector/soft_float_2_true-unreach-call_true-no-overflow_true-termination.c.cil.c 2 .36  .36  29 4.3  1.0  0   - - - - 0 750    690    7000 0   0   2 40     25     650   .66 0  
bitvector/soft_float_3_true-unreach-call_true-no-overflow_true-termination.c.cil.c 1 .73  .73  30 8.3  .85 0   - - - - 0 820    770    7000 0   0   0 960     890     790   .70 0  
bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c 2 3.2   3.2   30 41    1.0  0   - - - - 2 110    100    530 0   0   2 400     360     790   .71 0  
bitvector/soft_float_5_true-unreach-call_true-no-overflow_true-termination.c.cil.c 2 .35  .35  29 4.6  1.0  0   - - - - 0 890    820    7000 0   0   2 26     15     610   .62 0  
bitvector-regression/implicitfloatconversion_false-unreach-call_true-termination.c 1 .082 .083 26 1.1  1.0  0   1 3.7  2.0  250 0   0   1 15     9.0   300   .75 0   1 3.3  1.9  250 0   0   1 .59   .59   20    .041 0      - -
bitvector-regression/implicitunsignedconversion_false-unreach-call_true-termination.c 1 .083 .084 26 .80 1.0  0   1 3.7  2.1  240 0   0   1 6.6   3.8   300   .11 0   1 3.4  1.9  240 0   0   1 .57   .57   20    .041 0      - -
bitvector-regression/integerpromotion_false-unreach-call_true-termination.c 1 .081 .082 26 1.1  .85 0   1 3.9  2.2  250 0   0   1 12     7.2   300   .68 0   1 3.4  2.0  240 0   0   1 .56   .56   20    .041 0      - -
bitvector-regression/recHanoi03_false-unreach-call_true-termination.c 1 .62  .61  26 7.5  .85 0   0 91    76    1800 0   0   -32 14     7.9   310   .71 0   1 4.0  2.3  250 0   0   1 .57   .58   20    .049 0      - -
bitvector-regression/signextension2_false-unreach-call_true-termination.c 1 .083 .083 26 1.0  .85 0   1 3.8  2.1  240 0   0   1 7.4   4.1   300   .62 0   1 3.4  2.1  250 0   0   1 .59   .58   20    .045 0      - -
bitvector-regression/signextension_false-unreach-call_true-termination.c 1 .081 .081 26 1.0  1.0  0   1 3.8  2.1  250 0   0   1 6.7   4.2   300   .62 0   1 3.5  2.1  250 0   0   1 .57   .57   20    .045 0      - -
bitvector-regression/implicitunsignedconversion_true-unreach-call_true-termination.c 2 .076 .077 26 .88 1.0  0   - - - - 2 3.5  2.0  250 0   0   2 8.6   4.8   300   .66 0  
bitvector-regression/integerpromotion_true-unreach-call_true-termination.c 2 .093 .094 26 .63 .85 0   - - - - 2 4.2  2.4  250 0   0   2 15     9.1   300   .75 0  
bitvector-regression/signextension2_true-unreach-call_true-termination.c 2 .075 .075 26 .90 .85 0   - - - - 2 4.7  2.6  250 0   0   2 8.6   5.1   310   .66 0  
bitvector-regression/signextension_true-unreach-call_true-termination.c 2 .079 .080 26 .73 1.0  0   - - - - 2 3.9  2.1  250 0   0   2 10     5.8   310   .66 0  
bitvector-loops/diamond_false-unreach-call2.i 1 .11  .11  26 .87 1.0  0   1 4.5  2.5  250 0   0   1 8.7   5.3   320   .62 0   1 3.9  2.3  250 0   0   1 .60   .60   20    .049 0      - -
bitvector-loops/overflow_false-unreach-call1.i 0 900     850     14000 11000    .86 0   0 .60 .38 41 0   0   0 .028 .029 5.6 0    0   0 .93 .62 47 0   0   0 .0015 .0018 .40 0     0      - -
bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i 1 .26  .26  26 3.3  .85 0   1 6.1  3.5  280 0   0   0 98     70     6700   1.7  0   0 3.9  2.2  260 0   0   1 .58   .58   21    .049 .0041 - -
sv-benchmarks/c/ status score witness inspect witness cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
total 50 57 14000    14000    47000 170000   48    0   14 11 150 110 4700 0   0   14 -121 240 150 10000 8.4 0   14 8 52 30 3100 0   0   14 -87 7.1 7.1 250 .77 .0041 36 38 4000 3700 35000 0   0   36 28 9700 9200 21000 16   0  
    correct results 34 56 310    310    1800 3800   32    0   11 11 53 29 2800 0   0   7 7 100 61 2500 4.1 0   8 8 30 17 2000 0   0   9 9 5.2 5.2 180 .42 .0041 19 38 640 560 8000 0   0   14 28 1000 830 8100 9.6 0  
        correct true 22 44 300    300    1300 3600   21    0   0 0 0 0 19 38 640 560 8000 0   0   14 28 1000 830 8100 9.6 0  
        correct false 12 12 12    12    480 150   11    0   11 11 53 29 2800 0   0   7 7 100 61 2500 4.1 0   8 8 30 17 2000 0   0   9 9 5.2 5.2 180 .42 .0041 0 0
    correct-unconfimed results 1 1 .73 .73 30 8.3 .85 0   0 0 0 0 0 0
        correct-unconfirmed true 1 1 .73 .73 30 8.3 .85 0   0 0 0 0 0 0
        correct-unconfirmed false 0 0 0 0 0 0 0
    incorrect results 0 0 4 -128 40 23 1300 2.6 0   0 3 -96 1.9 1.9 62 .35 0      0 0
        incorrect true 0 0 4 -128 40 23 1300 2.6 0   0 3 -96 1.9 1.9 62 .35 0      0 0
        incorrect false 0 0 0 0 0 0 0
score (50 tasks, max score: 86) 57 11 -121 8 -87 38 28
Run set esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-esbmc-kind.sv-comp19_prop-reachsafety.ReachSafety-BitVectors