Tool CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a CPA-witness2test 1.7-svn 29852 CProver witness2test 0.1 CPAchecker 1.7-svn 29852 ULTIMATE Automizer 0.1.23-635dfa2a
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 90 s, memlimit: 7000 MB, CPU core limit: 2 timelimit: 900 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon*
OS Linux 4.15.0-42-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33546 MB
Date of execution 2018-12-05 05:46:16 CET 2018-12-06 09:44:44 CET 2018-12-06 10:50:29 CET 2018-12-06 10:57:45 CET 2018-12-12 19:32:16 CET 2018-12-06 08:37:23 CET 2018-12-06 09:52:34 CET
Run set cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors
Options -svcomp19 -heap 10000M -benchmark -timelimit 900s -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -setprop cpa.smg.memoryAllocationFunctions=malloc,__kmalloc,kmalloc,kzalloc,kzalloc_node,ldv_zalloc,ldv_malloc -setprop cpa.smg.arrayAllocationFunctions=calloc,kmalloc_array,kcalloc -setprop cpa.smg.zeroingMemoryAllocation=calloc,kzalloc,kcalloc,kzalloc_node,ldv_zalloc -setprop cpa.smg.deallocationFunctions=free,kfree,kfree_const -witness ../../results-verified/cpa-seq.2018-12-05_0546.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/cpa-seq.2018-12-05_0546.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop analysis.summaryEdges=true -setprop cpa.callstack.skipVoidRecursion=true -setprop cpa.callstack.skipFunctionPointerRecursion=true -witness ../../results-verified/cpa-seq.2018-12-05_0546.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --graphml-witness ../../results-verified/cpa-seq.2018-12-05_0546.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -witness ../../results-verified/cpa-seq.2018-12-05_0546.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml --full-output --validate ../../results-verified/cpa-seq.2018-12-05_0546.logfiles/${rundefinition_name}.${inputfile_name}.files/witness.graphml
sv-benchmarks/c/ status score witness inspect witness cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
bitvector/byte_add_false-unreach-call_true-no-overflow_true-termination.i false(unreach-call) 1 wit inspect 19   11   480 200 .090 0   false(unreach-call) 1 wit inspect 5.4  2.9  260 0   0   false(unreach-call) 1 --- inspect 39   23   590 .68 0   false(unreach-call) 1 --- inspect 4.4  2.5  260 0   0   true -32 --- inspect .72   .72   21    .10  0      - --- inspect - --- inspect
bitvector/sum02_false-unreach-call_true-no-overflow.i timeout 0 wit inspect 970   550   6100 8600 .025 0   error (invalid witness file) 0 --- inspect .80 .49 43 0   0   error (invalid witness file) 0 --- inspect 5.4 3.0 260 .61 0   error (invalid witness file) 0 --- inspect 1.1  .70 51 0   0   error (invalid witness file) 0 --- inspect .0022 .0028 .52 0     0      - --- inspect - --- inspect
bitvector/byte_add_1_true-unreach-call_true-no-overflow_true-termination.i true 2 wit inspect 14   6.3 500 130 .11  0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.0  4.8  370 0   0   timeout 0 --- inspect 960   920   1000 .70 0  
bitvector/byte_add_2_true-unreach-call_true-no-overflow_true-termination.i true 2 wit inspect 15   7.5 450 140 .11  0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.1  4.9  380 0   0   timeout 0 --- inspect 960   930   1000 .74 0  
bitvector/gcd_1_true-unreach-call_true-no-overflow.i true 2 wit inspect 9.0 6.3 300 92 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 9.9  7.7  320 0   0   timeout 0 --- inspect 960   950   550 .63 0  
bitvector/gcd_2_true-unreach-call_true-no-overflow.i true 2 wit inspect 9.8 6.9 310 110 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 160    150    560 0   0   timeout 0 --- inspect 960   950   620 .62 0  
bitvector/gcd_3_true-unreach-call_true-no-overflow.i true 2 wit inspect 94   91   320 1200 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 130    120    560 0   0   timeout 0 --- inspect 960   950   980 1.1  0  
bitvector/gcd_4_true-unreach-call_true-no-overflow_true-termination.i true 2 wit inspect 2.8 1.2 250 27 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 10    6.9  340 0   0   true 2 --- inspect 32   24   490 .62 0  
bitvector/interleave_bits_true-unreach-call_true-no-overflow.i true 2 wit inspect 9.1 3.8 480 76 .041 0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 14    9.2  380 0   0   true 2 --- inspect 170   150   680 .68 0  
bitvector/jain_1_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 4.1 1.7 280 36 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 760    750    7000 0   0   true 2 --- inspect 28   23   340 .62 0  
bitvector/jain_2_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 4.2 1.8 280 40 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 710    700    7000 0   0   true 2 --- inspect 18   15   320 .62 0  
bitvector/jain_4_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 4.1 1.7 280 38 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 590    580    7000 0   0   true 2 --- inspect 16   12   320 .62 0  
bitvector/jain_5_true-unreach-call_true-no-overflow.i timeout 0 wit inspect 960   620   9300 10000 0     0   - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .84 .50 44 0   0   error (invalid witness file) 0 --- inspect 5.6 3.0 270 .65 0  
bitvector/jain_6_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 4.3 1.7 290 43 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 550    540    7000 0   0   true 2 --- inspect 22   18   330 .62 0  
bitvector/jain_7_true-unreach-call_true-no-overflow_false-termination.i true 2 wit inspect 6.1 3.3 300 64 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 550    540    7000 0   0   true 2 --- inspect 23   17   330 .62 0  
bitvector/modulus_true-unreach-call_true-no-overflow.i true 2 wit inspect 230   210   2500 3100 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 17    14    350 0   0   true 2 --- inspect 17   10   330 .75 0  
bitvector/num_conversion_1_true-unreach-call_true-no-overflow.i true 2 wit inspect 2.9 1.3 240 26 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 6.2  3.4  290 0   0   true 2 --- inspect 32   21   550 .71 0  
bitvector/num_conversion_2_true-unreach-call_true-no-overflow.i true 2 wit inspect 19   12   650 220 .049 0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 5.6  3.1  290 0   0   timeout 0 --- inspect 960   930   2200 .69 0  
bitvector/parity_true-unreach-call_true-no-overflow.i witness invalid (true) 0 wit inspect 550   520   11000 8300 .016 0   - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .66 .40 44 0   0   error (invalid witness file) 0 --- inspect 6.1 3.6 270 .65 0  
bitvector/sum02_true-unreach-call_true-no-overflow.i timeout 0 wit inspect 970   540   6100 8900 .025 0   - --- inspect - --- inspect - --- inspect - --- inspect error (invalid witness file) 0 --- inspect .68 .41 43 0   0   error (invalid witness file) 0 --- inspect 5.5 2.9 260 .65 0  
bitvector/s3_clnt_1_false-unreach-call_true-no-overflow.BV.c.cil.c false(unreach-call) 1 wit inspect 10   3.6 420 90 .090 0   false(unreach-call) 1 wit inspect 6.3  3.4  280 0   0   false(unreach-call) 1 --- inspect 20   12   400 .68 0   unknown 0 --- inspect 5.8  3.2  290 0   0   true -32 --- inspect .75   .74   22    .16  0      - --- inspect - --- inspect
bitvector/s3_clnt_2_false-unreach-call_true-no-overflow.BV.c.cil.c false(unreach-call) 1 wit inspect 19   6.8 610 180 .25  0   false(unreach-call) 1 wit inspect 7.2  3.8  290 0   0   false(unreach-call) 1 --- inspect 25   14   530 .71 0   unknown 0 --- inspect 6.6  3.6  300 0   0   true -32 --- inspect .76   .76   24    .15  0      - --- inspect - --- inspect
bitvector/s3_clnt_3_false-unreach-call_true-no-overflow.BV.c.cil.c false(unreach-call) 1 wit inspect 7.8 2.5 290 70 .066 0   false(unreach-call) 1 wit inspect 6.2  3.3  290 0   0   false(unreach-call) 1 --- inspect 21   12   390 .68 0   unknown 0 --- inspect 5.2  3.0  280 0   0   true -32 --- inspect .73   .73   22    .15  0      - --- inspect - --- inspect
bitvector/s3_clnt_1_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 24   15   760 260 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 92    81    1100 0   0   true 2 --- inspect 46   27   830 .68 0  
bitvector/s3_clnt_2_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 17   9.0 660 170 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 23    14    620 0   0   true 2 --- inspect 50   29   930 .45 0  
bitvector/s3_clnt_3_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 18   9.5 690 200 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 19    12    580 0   0   true 2 --- inspect 34   19   740 .62 0  
bitvector/s3_srvr_1_alt_true-unreach-call_true-no-overflow.BV.c.cil.c timeout 0 wit inspect 940   580   5000 9000 .50  0   - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    5800 0   0   timeout 0 --- inspect 960   900   5400 .66 0  
bitvector/s3_srvr_1_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 20   11   690 200 0     0   - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    4700 0   0   true 2 --- inspect 55   31   940 .62 0  
bitvector/s3_srvr_2_alt_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c true 2 wit inspect 59   48   1300 650 0     0   - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    4300 0   0   true 2 --- inspect 40   22   880 .62 0  
bitvector/s3_srvr_2_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c true 2 wit inspect 58   46   1200 700 0     0   - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 900    890    4400 0   0   true 2 --- inspect 35   20   1000 .62 0  
bitvector/s3_srvr_3_alt_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 21   12   690 220 0     0   - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 910    890    6100 0   0   true 2 --- inspect 50   27   840 .62 0  
bitvector/s3_srvr_3_true-unreach-call_true-no-overflow.BV.c.cil.c true 2 wit inspect 22   12   690 250 0     0   - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 910    890    6200 0   0   true 2 --- inspect 44   24   860 .62 0  
bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 13   6.5 480 140 .033 0   - --- inspect - --- inspect - --- inspect - --- inspect timeout 0 wit inspect 910    860    5000 0   0   true 2 --- inspect 150   120   770 .71 0  
bitvector/soft_float_2_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 140   120   1100 1800 .13  0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 680    630    7000 0   0   true 2 --- inspect 36   24   540 .62 0  
bitvector/soft_float_3_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 1 wit inspect 110   90   1400 1300 .13  0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 870    810    7000 0   0   timeout 0 --- inspect 960   890   810 .70 0  
bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 170   170   450 2800 .033 0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 120    120    540 0   0   true 2 --- inspect 390   350   790 .68 0  
bitvector/soft_float_5_true-unreach-call_true-no-overflow_true-termination.c.cil.c true 2 wit inspect 140   120   1100 1500 .14  0   - --- inspect - --- inspect - --- inspect - --- inspect out of memory 0 --- inspect 820    760    7000 0   0   true 2 --- inspect 26   16   510 .62 0  
bitvector-regression/implicitfloatconversion_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 2.8 1.3 260 27 0     0   false(unreach-call) 1 wit inspect 3.7  2.1  250 0   0   false(unreach-call) 1 --- inspect 13   7.3 300 .75 0   false(unreach-call) 1 --- inspect 3.6  2.1  250 0   0   false(unreach-call) 1 --- inspect .56   .56   20    .041 .0041 - --- inspect - --- inspect
bitvector-regression/implicitunsignedconversion_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 2.9 1.3 250 24 0     0   false(unreach-call) 1 wit inspect 4.5  2.5  250 0   0   false(unreach-call) 1 --- inspect 6.5 4.1 300 .66 0   false(unreach-call) 1 --- inspect 3.6  2.1  250 0   0   false(unreach-call) 1 --- inspect .57   .57   20    .041 0      - --- inspect - --- inspect
bitvector-regression/integerpromotion_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 2.8 1.3 260 27 0     0   false(unreach-call) 1 wit inspect 3.9  2.2  250 0   0   false(unreach-call) 1 --- inspect 12   7.1 300 .71 0   false(unreach-call) 1 --- inspect 3.6  2.1  250 0   0   false(unreach-call) 1 --- inspect .56   .56   20    .041 0      - --- inspect - --- inspect
bitvector-regression/recHanoi03_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 64   53   1300 780 0     0   false(unreach-call) 1 wit inspect 8.6  4.6  300 0   0   false(unreach-call) 1 --- inspect 44   27   1200 .71 0   false(unreach-call) 1 --- inspect 5.1  2.8  260 0   0   false(unreach-call) 1 --- inspect .59   .59   21    .049 0      - --- inspect - --- inspect
bitvector-regression/signextension2_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 2.9 1.3 250 29 0     0   false(unreach-call) 1 wit inspect 3.9  2.2  250 0   0   true -32 --- inspect 6.6 4.1 300 .62 0   false(unreach-call) 1 --- inspect 3.8  2.2  250 0   0   false(unreach-call) 1 --- inspect .57   .57   20    .045 0      - --- inspect - --- inspect
bitvector-regression/signextension_false-unreach-call_true-termination.c false(unreach-call) 1 wit inspect 2.9 1.3 250 31 0     0   false(unreach-call) 1 wit inspect 3.9  2.2  250 0   0   true -32 --- inspect 6.6 3.7 290 .62 0   false(unreach-call) 1 --- inspect 3.8  2.2  250 0   0   false(unreach-call) 1 --- inspect .59   .59   20    .045 .0041 - --- inspect - --- inspect
bitvector-regression/implicitunsignedconversion_true-unreach-call_true-termination.c true 2 wit inspect 2.8 1.3 250 26 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.5  1.9  250 0   0   true 2 --- inspect 7.4 4.2 300 .66 0  
bitvector-regression/integerpromotion_true-unreach-call_true-termination.c true 2 wit inspect 2.8 1.3 260 26 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.7  2.1  250 0   0   true 2 --- inspect 13   7.6 290 .75 0  
bitvector-regression/signextension2_true-unreach-call_true-termination.c true 2 wit inspect 2.8 1.2 250 24 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 3.6  2.1  250 0   0   true 2 --- inspect 9.0 5.3 310 .62 0  
bitvector-regression/signextension_true-unreach-call_true-termination.c true 2 wit inspect 2.9 1.3 250 25 0     0   - --- inspect - --- inspect - --- inspect - --- inspect true 2 wit inspect 4.3  2.4  250 0   0   true 2 --- inspect 8.9 5.0 310 .66 0  
bitvector-loops/diamond_false-unreach-call2.i false(unreach-call) 1 wit inspect 6.0 2.2 290 52 .033 0   false(unreach-call) 1 wit inspect 4.6  2.6  250 0   0   false(unreach-call) 1 --- inspect 8.5 4.7 320 .66 0   false(unreach-call) 1 --- inspect 3.9  2.3  250 0   0   true -32 --- inspect .58   .58   21    .049 0      - --- inspect - --- inspect
bitvector-loops/overflow_false-unreach-call1.i timeout 0 wit inspect 970   620   9200 8900 0     0   error (invalid witness file) 0 --- inspect .64 .41 42 0   0   error (invalid witness file) 0 --- inspect 5.8 3.1 270 .65 0   error (invalid witness file) 0 --- inspect 1.0  .65 48 0   0   error (invalid witness file) 0 --- inspect .0017 .0021 .52 0     0      - --- inspect - --- inspect
bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i false(unreach-call) 1 wit inspect 13   5.5 490 130 .082 0   false(unreach-call) 1 wit inspect 6.3  3.5  310 0   0   timeout 0 --- inspect 97   85   1300 .97 0   false(unreach-call) 1 --- inspect 4.5  2.6  260 0   0   false(unreach-call) 1 --- inspect .65   .65   21    .061 .0041 - --- inspect - --- inspect
sv-benchmarks/c/ status score witness inspect witness cpu (s) wall (s) mem (MB) energy (J) blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB) status score witness inspect witness cpu (s) wall (s) mem (MB) energy blkio-w (MB) blkio-r (MB)
total 50 75 6700 4500 71000 71000 2.1  0   14 12 66 36 3300 0   0   14 -55 310 210   6700 9.7 0   14 9 56 32 3200 0   0   14 -153 7.6 7.6 250 .93 .012 36 36 13000 12000 100000 0   0   36 50 9000 8500 28000 24 0  
    correct results 43 74 1300 1000 23000 16000 1.4  0   12 12 65 35 3200 0   0   9 9 190 110   4300 6.2 0   9 9 36 21 2300 0   0   7 7 4.1 4.1 140 .32 .012 18 36 640 560 7700 0   0   25 50 1300 1000 15000 16 0  
        correct true 31 62 1100 930 18000 14000 .78 0   0 0 0 0 18 36 640 560 7700 0   0   25 50 1300 1000 15000 16 0  
        correct false 12 12 150 91 5100 1600 .61 0   12 12 65 35 3200 0   0   9 9 190 110   4300 6.2 0   9 9 36 21 2300 0   0   7 7 4.1 4.1 140 .32 .012 0 0
    correct-unconfimed results 1 1 110 90 1400 1300 .13 0   0 0 0 0 0 0
        correct-unconfirmed true 1 1 110 90 1400 1300 .13 0   0 0 0 0 0 0
        correct-unconfirmed false 0 0 0 0 0 0 0
    incorrect results 0 0 2 -64 13 7.9 590 1.2 0   0 5 -160 3.5 3.5 110 .61 0     0 0
        incorrect true 0 0 2 -64 13 7.9 590 1.2 0   0 5 -160 3.5 3.5 110 .61 0     0 0
        incorrect false 0 0 0 0 0 0 0
score (50 tasks, max score: 86) 75 12 -55 9 -153 36 50
Run set cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-cpa-seq.sv-comp19_prop-reachsafety.ReachSafety-BitVectors