Tool symbiotic 5.0.0-KLEE:1faddfe0-dg:12c34aac-symbiotic:5e14b94d-minisat:3db58943-llvm-instrumentation:cd767593-stp:17249213 CPAchecker 1.6.1-svn 26773 ULTIMATE Automizer 0.1.23-3204b741 CPA-witness2test 1.6.1-svn 26773 CProver witness2test 0.1 CPAchecker 1.6.1-svn 26773 ULTIMATE Automizer 0.1.23-3204b741
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8 timelimit: 90 s, memlimit: 7000 MB, CPU core limit: 2 timelimit: 900 s, memlimit: 7000 MB, CPU core limit: 2
Host apollon* [apollon005; apollon043; apollon077; apollon078; apollon087; apollon118] [apollon061; apollon077; apollon078; apollon086; apollon134] [apollon038; apollon077; apollon078; apollon083] [apollon077; apollon078; apollon161] apollon*
OS Linux 4.4.0-101-generic
System CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: 8, frequency: 3.8 GHz, Turbo Boost: disabled; RAM: 33553 MB CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: [8; 4], frequency: 3.8 GHz, Turbo Boost: disabled; RAM: [33553 MB; 33554 MB] CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: [4; 8], frequency: 3.8 GHz, Turbo Boost: disabled; RAM: [33554 MB; 33553 MB] CPU: Intel Xeon E3-1230 v5 @ 3.40 GHz, cores: [8; 4], frequency: 3.8 GHz, Turbo Boost: disabled; RAM: [33553 MB; 33554 MB]
Date of execution 2017-12-01 22:41:19 CET 2017-12-02 21:10:50 CET 2017-12-02 22:39:24 CET 2017-12-02 22:51:52 CET 2017-12-02 23:01:21 CET 2017-12-02 19:44:15 CET 2017-12-02 21:36:25 CET
Run set symbiotic.sv-comp18.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-symbiotic.sv-comp18-correctness-witness.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-symbiotic.sv-comp18-correctness-witness.ReachSafety-BitVectors
Options --witness witness.graphml -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -witness ../../results-verified/symbiotic.2017-12-01_2241.logfiles/sv-comp18.${inputfile_name}.files/witness.graphml -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true -setprop cpa.smg.memoryAllocationFunctions=malloc,__kmalloc,kmalloc,kzalloc,kzalloc_node,ldv_zalloc,ldv_malloc -setprop cpa.smg.arrayAllocationFunctions=calloc,kmalloc_array,kcalloc -setprop cpa.smg.zeroingMemoryAllocation=calloc,kzalloc,kcalloc,kzalloc_node,ldv_zalloc -setprop cpa.smg.deallocationFunctions=free,kfree,kfree_const --full-output --validate ../../results-verified/symbiotic.2017-12-01_2241.logfiles/sv-comp18.${inputfile_name}.files/witness.graphml -witness2test -setprop witness.checkProgramHash=false -heap 5000m -benchmark -witness ../../results-verified/symbiotic.2017-12-01_2241.logfiles/sv-comp18.${inputfile_name}.files/witness.graphml -setprop analysis.summaryEdges=true -setprop cpa.callstack.skipVoidRecursion=true -setprop cpa.callstack.skipFunctionPointerRecursion=true --graphml-witness ../../results-verified/symbiotic.2017-12-01_2241.logfiles/sv-comp18.${inputfile_name}.files/witness.graphml -witnessValidation -setprop witness.checkProgramHash=false -heap 5000m -benchmark -witness ../../results-verified/symbiotic.2017-12-01_2241.logfiles/sv-comp18.${inputfile_name}.files/witness.graphml -setprop cpa.predicate.memoryAllocationsAlwaysSucceed=true --full-output --validate ../../results-verified/symbiotic.2017-12-01_2241.logfiles/sv-comp18.${inputfile_name}.files/witness.graphml
sv-benchmarks/c/ status score witness inspect witness cpu (s) mem (MB) energy (J) status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy
bitvector/byte_add_false-unreach-call_true-no-overflow_true-termination.i 1 .31 12 4.0 1 3.0  270 -32 5.2   250   0 2.1  210 1 .59   18    - -
bitvector/sum02_false-unreach-call_true-no-overflow.i 0 900    790 13000   0 .56 44 0 .020 4.9 0 .67 49 0 .0037 .28 - -
bitvector/byte_add_1_true-unreach-call_true-no-overflow_true-termination.i 2 .32 12 3.9 - - - - 2 7.8  290 0 960     1100  
bitvector/byte_add_2_true-unreach-call_true-no-overflow_true-termination.i 2 .35 12 4.0 - - - - 2 5.5  340 0 960     1000  
bitvector/gcd_1_true-unreach-call_true-no-overflow.i 2 .42 12 5.0 - - - - 2 12    300 0 960     640  
bitvector/gcd_2_true-unreach-call_true-no-overflow.i 2 9.8  15 130   - - - - 2 150    460 0 960     600  
bitvector/gcd_3_true-unreach-call_true-no-overflow.i 2 9.4  15 120   - - - - 2 170    460 0 960     2400  
bitvector/gcd_4_true-unreach-call_true-no-overflow_true-termination.i 2 .17 11 1.6 - - - - 2 6.6  300 2 41     560  
bitvector/interleave_bits_true-unreach-call_true-no-overflow.i 2 .16 12 2.0 - - - - 2 7.2  310 2 150     620  
bitvector/jain_1_true-unreach-call_true-no-overflow_false-termination.i 0 900    75 8700   - - - - 0 .69 44 0 .023 4.9
bitvector/jain_2_true-unreach-call_true-no-overflow_false-termination.i 0 900    94 8500   - - - - 0 .67 44 0 .020 4.9
bitvector/jain_4_true-unreach-call_true-no-overflow_false-termination.i 0 900    15000 13000   - - - - 0 .58 44 0 .018 4.9
bitvector/jain_5_true-unreach-call_true-no-overflow.i 0 900    15000 12000   - - - - 0 .66 41 0 .023 4.8
bitvector/jain_6_true-unreach-call_true-no-overflow_false-termination.i 0 900    15000 13000   - - - - 0 .55 44 0 .019 4.8
bitvector/jain_7_true-unreach-call_true-no-overflow_false-termination.i 0 900    15000 14000   - - - - 0 .64 43 0 .019 4.8
bitvector/modulus_true-unreach-call_true-no-overflow.i 2 640    57 8600   - - - - 2 12    320 2 18     340  
bitvector/num_conversion_1_true-unreach-call_true-no-overflow.i 2 .17 11 1.6 - - - - 2 4.2  270 2 54     640  
bitvector/num_conversion_2_true-unreach-call_true-no-overflow.i 2 .17 12 2.0 - - - - 2 3.2  270 0 960     1100  
bitvector/parity_true-unreach-call_true-no-overflow.i 2 7.4  13 99   - - - - 2 23    320 0 960     1000  
bitvector/sum02_true-unreach-call_true-no-overflow.i 0 900    770 9900   - - - - 0 .68 44 0 .035 4.8
bitvector/s3_clnt_1_false-unreach-call_true-no-overflow.BV.c.cil.c 1 .42 13 4.7 1 13    360 -32 4.2   260   0 3.6  210 -32 .62   18    - -
bitvector/s3_clnt_2_false-unreach-call_true-no-overflow.BV.c.cil.c 1 .61 14 8.0 1 34    380 -32 5.6   250   0 3.5  210 -32 .62   18    - -
bitvector/s3_clnt_3_false-unreach-call_true-no-overflow.BV.c.cil.c 1 .28 12 3.5 1 5.1  420 -32 4.1   270   0 3.5  210 -32 .66   18    - -
bitvector/s3_clnt_1_true-unreach-call_true-no-overflow.BV.c.cil.c 2 .59 13 7.6 - - - - 2 66    890 2 38     790  
bitvector/s3_clnt_2_true-unreach-call_true-no-overflow.BV.c.cil.c 2 .62 13 6.8 - - - - 2 19    450 2 40     880  
bitvector/s3_clnt_3_true-unreach-call_true-no-overflow.BV.c.cil.c 2 .62 13 6.4 - - - - 2 14    520 2 32     800  
bitvector/s3_srvr_1_alt_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900    400 11000   - - - - 0 .53 43 0 .048 4.9
bitvector/s3_srvr_1_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900    1100 12000   - - - - 0 .63 42 0 .021 4.8
bitvector/s3_srvr_2_alt_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c 0 900    130 11000   - - - - 0 .42 44 0 .023 5.0
bitvector/s3_srvr_2_true-unreach-call_true-no-overflow_false-termination.BV.c.cil.c 0 900    220 10000   - - - - 0 .53 43 0 .020 4.9
bitvector/s3_srvr_3_alt_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900    210 11000   - - - - 0 .68 43 0 .020 4.8
bitvector/s3_srvr_3_true-unreach-call_true-no-overflow.BV.c.cil.c 0 900    210 13000   - - - - 0 .58 44 0 .022 4.8
bitvector/soft_float_1_true-unreach-call_true-no-overflow_true-termination.c.cil.c 2 680    160 9200   - - - - 0 900    6100 2 120     750  
bitvector/soft_float_2_true-unreach-call_true-no-overflow_true-termination.c.cil.c 2 2.8  15 38   - - - - 0 910    6300 2 57     710  
bitvector/soft_float_3_true-unreach-call_true-no-overflow_true-termination.c.cil.c 1 4.7  18 62   - - - - 0 910    6300 0 960     750  
bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c 0 900    45 12000   - - - - 0 .62 44 0 .024 4.9
bitvector/soft_float_5_true-unreach-call_true-no-overflow_true-termination.c.cil.c 2 2.7  16 35   - - - - 0 920    6300 2 25     610  
bitvector-regression/implicitfloatconversion_false-unreach-call_true-termination.c 1 .14 11 1.6 1 2.9  280 1 8.9   240   0 2.7  180 1 .57   18    - -
bitvector-regression/implicitunsignedconversion_false-unreach-call_true-termination.c 1 .16 11 1.7 1 3.1  260 1 4.6   220   0 1.9  180 1 .59   18    - -
bitvector-regression/integerpromotion_false-unreach-call_true-termination.c 1 .14 11 1.4 1 4.2  260 1 6.0   240   0 2.7  190 1 .57   18    - -
bitvector-regression/recHanoi03_false-unreach-call_true-termination.c 0 900    2500 11000   0 .42 44 0 .048 4.9 0 .67 49 0 .0017 .26 - -
bitvector-regression/signextension2_false-unreach-call_true-termination.c 1 .13 11 1.7 1 3.3  260 1 3.0   210   0 2.7  180 1 .57   18    - -
bitvector-regression/signextension_false-unreach-call_true-termination.c 1 .16 11 1.5 1 2.2  250 1 3.1   220   0 2.0  190 1 .56   18    - -
bitvector-regression/implicitunsignedconversion_true-unreach-call_true-termination.c 2 .12 11 1.3 - - - - 2 2.0  250 2 4.9   250  
bitvector-regression/integerpromotion_true-unreach-call_true-termination.c 2 .15 11 1.4 - - - - 2 3.0  250 2 12     240  
bitvector-regression/signextension2_true-unreach-call_true-termination.c 2 .12 11 1.5 - - - - 2 4.0  250 2 5.2   260  
bitvector-regression/signextension_true-unreach-call_true-termination.c 2 .15 11 1.5 - - - - 2 3.2  250 2 5.6   260  
bitvector-loops/diamond_false-unreach-call2.i 1 .16 11 2.0 1 2.3  260 -32 4.9   230   0 2.1  210 1 .57   18    - -
bitvector-loops/overflow_false-unreach-call1.i 1 .16 11 1.6 0 92    1600 -32 3.5   260   0 2.6  180 1 3.9    18    - -
bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i 0 .41 13 5.3 0 91    830 -32 3.5   240   0 2.0  210 -32 .57   18    - -
sv-benchmarks/c/ status score witness inspect witness cpu (s) mem (MB) energy (J) status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy status score witness inspect witness cpu (s) mem (MB) energy
total 50 54 16000    67000 200000   14 10 260 5500 14 -219 57 2900 14 0 33 2500 14 -120 10   220 36 36 4200 32000 36 28 8300 16000
    correct results 32 53 1400    590 18000   10 10 74 3000 5 5 26 1100 0 8 8 8.0 150 18 36 510 6500 14 28 610 7700
        correct true 21 42 1400    460 18000   0 0 0 0 18 36 510 6500 14 28 610 7700
        correct false 11 11 2.7  130 32   10 10 74 3000 5 5 26 1100 0 8 8 8.0 150 0 0
    correct-unconfimed results 2 1 5.1  31 67   0 0 0 0 0 0
        correct-unconfirmed true 1 1 4.7  18 62   0 0 0 0 0 0
        correct-unconfirmed false 1 0 .41 13 5.3 0 0 0 0 0 0
    incorrect results 0 0 7 -224 31 1800 0 4 -128 2.5 74 0 0
        incorrect true 0 0 7 -224 31 1800 0 4 -128 2.5 74 0 0
        incorrect false 0 0 0 0 0 0 0
score (50 tasks, max score: 86) 54 10 -219 0 -120 36 28
Run set symbiotic.sv-comp18.ReachSafety-BitVectors cpa-seq-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors uautomizer-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors cpa-witness2test-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors fshell-witness2test-validate-violation-witnesses-symbiotic.sv-comp18-violation-witness.ReachSafety-BitVectors cpa-seq-validate-correctness-witnesses-symbiotic.sv-comp18-correctness-witness.ReachSafety-BitVectors uautomizer-validate-correctness-witnesses-symbiotic.sv-comp18-correctness-witness.ReachSafety-BitVectors