Tool CPAchecker 1.4-svcomp16c
Limits timelimit: 900 s, memlimit: 15000 MB, CPU core limit: 8
Host [zeus01; zeus02; zeus03; zeus04; zeus05; zeus06; zeus07; zeus08; zeus09; zeus10; zeus11; zeus12; zeus13; zeus14; zeus15; zeus16; zeus17; zeus18; zeus19; zeus20; zeus21; zeus22; zeus23; zeus24]
OS Linux 4.2.0-22-generic
System CPU: Intel Xeon E5-2650 v2 @ 2.60 GHz, cores: 32, frequency: 3.4 GHz; RAM: 135149 MB
Date of execution 2016-01-04 06:25:51 CET [[ 2016-01-15 08:31:02 CET ]] [[ 2016-01-15 21:59:57 CET ]]
Run set sv-comp16.BitVectorsReach
Options -sv-comp16-bam -disable-java-assertions -heap 10000m -setprop cpa.arg.errorPath.graphml=error-witness.graphml [[ -witness-check -disable-java-assertions -heap 10000m -setprop cpa.arg.errorPath.graphml=error-witness.graphml -spec ../../results-verified/cpa-bam.2016-01-04_0625.logfiles/sv-comp16.${inputfile_name}.files/error-witness.graphml ]][[ ../../results-verified/cpa-bam.2016-01-04_0625.logfiles/sv-comp16.${inputfile_name}.files/error-witness.graphml ]]
../../sv-benchmarks/c/ status cputime (s) walltime (s) memUsage (MB) witness wit1_status wit1_cputime (s) wit1_walltime (s) wit1_memUsage (MB) wit2_status wit2_cputime (s) wit2_walltime (s) wit2_memUsage (MB)
bitvector/byte_add_false-unreach-call.i timeout 900   840   1400 wit - -
bitvector/byte_add_1_true-unreach-call.i true 47   20   920 wit - -
bitvector/byte_add_2_true-unreach-call.i timeout 900   840   1500 wit - -
bitvector/gcd_1_true-unreach-call.i true 9.6 7.3 240 wit - -
bitvector/gcd_2_true-unreach-call.i true 8.5 5.9 230 wit - -
bitvector/gcd_3_true-unreach-call.i true 420   420   680 wit - -
bitvector/gcd_4_true-unreach-call.i true 4.3 2.0 230 wit - -
bitvector/interleave_bits_true-unreach-call.i true 7.0 3.0 420 wit - -
bitvector/jain_1_true-unreach-call.i true 3.9 1.8 230 wit - -
bitvector/jain_2_true-unreach-call.i true 4.0 1.8 220 wit - -
bitvector/jain_4_true-unreach-call.i true 3.9 1.9 230 wit - -
bitvector/jain_5_true-unreach-call.i timeout 900   870   880 wit - -
bitvector/jain_6_true-unreach-call.i true 4.1 1.9 230 wit - -
bitvector/jain_7_true-unreach-call.i true 5.8 3.7 230 wit - -
bitvector/modulus_true-unreach-call.i timeout 900   900   470 wit - -
bitvector/num_conversion_1_true-unreach-call.i true 3.7 1.7 230 wit - -
bitvector/num_conversion_2_true-unreach-call.i true 16   11   640 wit - -
bitvector/parity_true-unreach-call.i timeout 900   860   2100 wit - -
bitvector/sum02_true-unreach-call.i timeout 900   860   970 wit - -
bitvector/s3_clnt_1_false-unreach-call.BV.c.cil.c timeout 900   830   2500 wit - -
bitvector/s3_clnt_2_false-unreach-call.BV.c.cil.c false(reach) 51   15   1300 wit false(reach) 14   7.5 480 false(reach) 36   20   500
bitvector/s3_clnt_3_false-unreach-call.BV.c.cil.c timeout 900   840   1300 wit - -
bitvector/s3_clnt_1_true-unreach-call.BV.c.cil.c timeout 900   830   1500 wit - -
bitvector/s3_clnt_2_true-unreach-call.BV.c.cil.c true 60   25   1100 wit - -
bitvector/s3_clnt_3_true-unreach-call.BV.c.cil.c timeout 900   830   2500 wit - -
bitvector/s3_srvr_1_alt_true-unreach-call.BV.c.cil.c timeout 900   840   3600 wit - -
bitvector/s3_srvr_1_true-unreach-call.BV.c.cil.c timeout 900   840   3600 wit - -
bitvector/s3_srvr_2_alt_true-unreach-call.BV.c.cil.c timeout 900   830   1400 wit - -
bitvector/s3_srvr_2_true-unreach-call.BV.c.cil.c timeout 900   830   910 wit - -
bitvector/s3_srvr_3_alt_true-unreach-call.BV.c.cil.c timeout 900   840   2500 wit - -
bitvector/s3_srvr_3_true-unreach-call.BV.c.cil.c timeout 900   840   2500 wit - -
bitvector/soft_float_1_true-unreach-call.c.cil.c timeout 900   830   3700 wit - -
bitvector/soft_float_2_true-unreach-call.c.cil.c timeout 900   840   4300 wit - -
bitvector/soft_float_3_true-unreach-call.c.cil.c timeout 900   840   3800 wit - -
bitvector/soft_float_4_true-unreach-call.c.cil.c true 150   140   840 wit - -
bitvector/soft_float_5_true-unreach-call.c.cil.c timeout 900   840   4600 wit - -
bitvector-regression/implicitfloatconversion_false-unreach-call.i false(reach) 3.2 1.5 230 wit false(reach) 4.5 2.8 230 error 10   6.4 320
bitvector-regression/implicitunsignedconversion_false-unreach-call.i false(reach) 3.9 1.8 220 wit false(reach) 4.5 2.6 220 false(reach) 11   6.5 330
bitvector-regression/integerpromotion_false-unreach-call.i false(reach) 5.2 2.1 240 wit false(reach) 7.2 4.1 340 false(reach) 20   12   370
bitvector-regression/signextension2_false-unreach-call.i false(reach) 5.1 2.1 250 wit false(reach) 7.1 3.9 340 false(reach) 12   6.8 350
bitvector-regression/signextension_false-unreach-call.i false(reach) 5.2 2.1 240 wit false(reach) 6.4 3.6 340 false(reach) 11   6.5 340
bitvector-regression/implicitunsignedconversion_true-unreach-call.i true 3.6 1.7 210 wit - -
bitvector-regression/integerpromotion_true-unreach-call.i true 3.5 1.6 220 wit - -
bitvector-regression/signextension2_true-unreach-call.i true 3.6 1.6 220 wit - -
bitvector-regression/signextension_true-unreach-call.i true 3.5 1.6 220 wit - -
bitvector-loops/diamond_false-unreach-call2.i false(reach) 6.0 2.0 360 wit false(reach) 5.6 3.2 250 false(reach) 12   9.1 320
bitvector-loops/overflow_false-unreach-call1.i timeout 900   880   780 wit - -
bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call.i timeout 900   880   12000 wit - -
../../sv-benchmarks/c/ status cputime (s) walltime (s) memUsage (MB) witness wit1_status wit1_cputime (s) wit1_walltime (s) wit1_memUsage (MB) wit2_status wit2_cputime (s) wit2_walltime (s) wit2_memUsage (MB)
total tasks 48 21000 19000 69000 48 50   28   2200   48 110   67   2500  
    correct results 26 850 680 10000 7 50   28   2200   6 110   67   2500  
        correct true 19 770 660 7600 0 0   0   0   0 0   0   0  
        correct false 7 79 26 2800 7 50   28   2200   6 110   67   2500  
    incorrect results 0
        incorrect true 0
        incorrect false 0
score (48 tasks, max score: 84) 45
Run set sv-comp16.BitVectorsReach